Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2008-04-30
2009-12-29
Lindsay, Jr., Walter L (Department: 2812)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S737000, C257SE23018, C156S556000
Reexamination Certificate
active
07638883
ABSTRACT:
A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a bump forming method are provided. After a resin14containing a solder powder16and a gas bubble generating agent is supplied to a space between a circuit board21having a plurality of connecting terminals11and a semiconductor chip20having a plurality of electrode terminals12, the resin14is heated to generate gas bubbles30from the gas bubble generating agent contained in the resin14. The resin14is pushed toward the outside of the generated gas bubbles30by the growth thereof and self-assembled between the connecting terminals11and the electrode terminals12. By further heating the resin14and melting the solder powder16contained in the resin14self-assembled between the terminals, connectors22are formed between the terminals to complete a flip chip mounting body.
REFERENCES:
patent: 2002/0185309 (2002-12-01), Imamura et al.
patent: 2009/0126876 (2009-05-01), Karashima et al.
patent: 01-157796 (1989-06-01), None
patent: 06-125169 (1994-05-01), None
patent: 11-186334 (1999-07-01), None
patent: 2000-094179 (2000-04-01), None
patent: 2000-332055 (2000-11-01), None
patent: 2002-026070 (2002-01-01), None
patent: 2002-329745 (2002-11-01), None
patent: 2004-260131 (2004-09-01), None
Rito, Masahiro et al., “Assembly Process by Electrically Conductive Adhesive Using Low Melting Point Fillers,” 9th Symposium on “Microjoining and Assembly Technology in Electronics,” Feb. 6-7, 2003, Yokohama.
Yasuda, Masahiro et al., “Self-Organized Joining Assembly Process by Electrically Conductive Adhesive Using Low Melting Point Fillers,” 10th Symposium on “Microjoining and Assembly Technology in Electronics,” Feb. 5-6, 2004, Yokohama.
Yasuda, Kiyokazu et al., “Self-Organized Packaging Using Polymer Containing Low-Melting-Point-Metal Filler-Process Simulation of Viscous Multi Phase Flow Fluid,” 11th Symposium on “Microjoining and Assembly Technology in Electronics,” Feb. 3-4, 2005, Yokohama.
Yamada, Takayuki et al., “Self-organized Packaging by Polymer Containing Low Melting Point Metal-Experimental-Verification of Process Rule Factors of Self-organization,” 11th Symposium on “Microjoining and Assembly Technology in Electronics,” Feb. 3-4, 2005, Yokohama.
Karashima Seiji
Kitae Takashi
Nakatani Seiichi
Lindsay, Jr. Walter L
McDermott Will & Emery LLP
Panasonic Corporation
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