Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2002-08-23
2004-05-11
Vu, Hung (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S688000, C257S737000, C257S783000, C257S788000, C257S792000, C257S795000
Reexamination Certificate
active
06734567
ABSTRACT:
FIELD OF THE INVENTION
The present invention is related in general to the field of electronic systems and semiconductor devices and more specifically to a flip-chip device thermomechanically strengthened by a guard ring in the substrate.
DESCRIPTION OF THE RELATED ART
One of the main functions of the metal leadframe for integrated circuit (IC) chips (invented in U.S. Pat. Nos. 3,716,764 and 4,034,027) is to provide a stable support pad for firmly positioning the IC chip. The attachment of the chip to this pad is performed by a layer of polymerizable adhesive. Common choices include epoxy-based or polyimide-based adhesives. It has been common practice to apply these adhesives to the leadframe pad at low viscosity so that they can spread out over the pad and will be pressured by the IC chip into a uniform layer with a fillet of excess material protruding from all edges of the chip. As a matter of convenience, this protruding fillet was commonly used an easily visible marker of process control to indicate flawless chip attachment. Some schematic drawings can be found in early literature, for example J. C. Bolger and C. T. Mooney, “Failure Mechanisms for Epoxy Die Attach Adhesives in Plastic Encapsulated IC's”, IEEE 33
rd
Electronic Comp. Conf., pp. 227-231, 1983; C. G. M. van Kessel, S. A. Gee, and J. J. Murphy, “The Quality of Die Attachment and its Relationship to Stresses and Vertical Die Cracking”, IEEE 33
rd
Electronic Comp. Conf., pp.237-244, 1983.
Much effort of the industry has been dedicated to ensure uniform and void-free application of the chip attach adhesive so that cracks in the adhesive or especially delamination of the chip from the leadframe, caused by thermomechanical stress, would be avoided. No particular attention was paid to the fillet of the attach material, since any crack in or through the fillet did not matter for the electrical performance of a chip attached to a metal leadframe.
Recent trends in packaging have changed this situation. For many device types, especially in the chip-scale families, the chip is attached to a thin plastic film rather than a metallic leadframe. A crack through the fillet can easily continue into the thin plastic substrate and create an electrical short to one of the patterned interconnections integral with the substrate.
Analogous considerations hold for the paradigm shift of modern flip-chip devices compared to the traditional mounting of an integrated circuit chip onto a printed circuit substrate by solder bump interconnections. The integrated circuit chip is spaced apart from the printed circuit substrate by a gap. The solder bump interconnections extend across the gap and connect contact pads on the integrated circuit chip to terminal pads on the printed circuit substrate to attach the chip and then conduct electrical signals, power and ground potential to and from the chip for processing. There is a significant difference between the coefficient of thermal expansion (CTE) between the semiconductor material used for the chip and the material typically used for the substrate; for instance, with silicon as the semiconductor material and plastic FR-4 as substrate material, the difference in CTE is about an order of magnitude.
As a consequence of the CTE difference, mechanical stresses are created when the assembly is subjected to thermal cycling during use or testing. These stresses tend to fatigue the solder bump interconnections, resulting in cracks and thus eventual failure of the assembly. In order to strengthen the solder joints without affecting the electrical connection, the gap is customarily filled with a polymeric material, which encapsulates the bumps and fills any space in the gap between the semiconductor chip and the substrate. A fillet of polymeric material is protruding over the perimeter of the chip to form a meniscus ring around the assembly (see for instance the publications in IBM J. Res. Develop., vol. 13, pp. 226-296, 1969).
The encapsulant is typically applied after the solder bumps are reflowed to bond the integrated circuit chip to the printed circuit substrate. A polymeric precursor, sometimes referred to as the “underfill”, is dispensed onto the substrate adjacent to the chip and is pulled into the gap by capillary forces. The precursor is heated, polymerized and “cured” to form the encapsulant. It is well known in the industry that the elevated temperature and the temperature cycling needed for this curing can also create mechanical stresses which can be detrimental to the chip and the solder interconnections. The stresses may delaminate the solder joint, crack the passivation of the chip, or propagate fractures into the circuit structures. The problems are aggravated for devices in which the solder bumps are connecting to a thin plastic film rather than a sturdy circuit board.
An urgent need has therefore arisen for a device design that provides a stress-reduced and crack-safe chip attach and underfill structure as far as the plastic fillet is concerned. The design should be simple and low cost, applicable to any size chip and any chip contour. At the same time, the structure should be flexible to be applied to a wide spectrum of material and process variations, leading to improved semiconductor device reliability. Preferably, these improvements should be accomplished using the installed equipment base so that only little investment in new manufacturing machines is needed.
SUMMARY OF THE INVENTION
The invention describes electronic devices of improved reliability having a substrate of electrically insulating material, further an integrated circuit chip with a periphery and a surface. Using a layer of polymeric material, the chip surface is mounted on the substrate surface. The polymeric material protrudes beyond the chip periphery and spreads some distance along the substrate surface. A metal layer is on the substrate surface, this layer is shaped as a band around the chip periphery; the band has an inner edge near the chip periphery, and an outer edge near the contour of the polymer protrusion. This metal band serves as a guard ring to stop any nascent crack propagating in the polymer protrusion.
In the first embodiment of the invention, the chip surface is the “active” surface including the integrated circuit. Consequently, the mounting is provided by solder bumps between the chip and the substrate, and the polymeric material is the so-called bump “underfill” material.
In the second embodiment of the invention, the chip surface is the “passive” surface opposite the integrated circuit. Consequently, the polymeric material is adhesive and is able to provide the chip mounting by attaching it to the substrate.
It is an aspect of the present invention to provide the metallic guard ring without an additional process step.
Another aspect of the invention is to prevent a nascent crack through the polymer bulge from penetrating into the substrate (and possibly creating an electrical short to one of the patterned metal interconnections), but rather to be stopped by the metal guard ring or to be side-tracked along the substrate surface.
Another aspect of the invention is to drastically reduce the number of failures in semiconductor-packages and flip-chip devices by changing the failure mechanism from a probabilistic weakest-link mode to a parallel-type mode. In known technology, cracks through the polymer bulge, initiated by thermomechanical stress and implied with enough energy, are able to migrate until they find the weakest link in the assembly and break or delaminate the assembly. The failure mechanism is, therefore, controlled by the probability that a nascent crack will find the weakest link.
According to the Griffith energy-balance concept for crack formation in brittle solids (first published in 1920), a change in the length of a nascent crack or notch cannot change the sum of all energies; in other words, the sum of surface energy and mechanical energy has to stay constant. This means for a crack extension that the surface energy may generally increase, but the mechanical energy has to de
Chiu Tz-Cheng
Yunus Mohammad
Brady W. James
Swayze, Jr. W. Daniel
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Vu Hung
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