Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Patent
1998-07-27
2000-11-28
Hardy, David
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
257777, 257779, 257789, 257795, 257780, 257784, 257785, 257786, 257772, 257688, H01L 2348
Patent
active
061539384
ABSTRACT:
A stable low-connecting resistance connection arrangement having a high yield rate without using any special material or process for a substrate. A flip-chip connecting structure in which the semiconductor integrated circuit (IC) chip is mounted directly on an organic circuit substrate. To achieve reliable connection and low-connecting resistance, the present invention absorbs variation of the heights of projecting electrodes formed on a semiconductor IC chip and substrate electrodes of an organic circuit substrate for example, by deforming the substrate electrodes and/or substrate layer of the organic circuit substrate. Resin of a conductive paste disposed between the projecting electrodes and substrate electrodes is squeezed out leaving a high density conductive particle layer to lower a contact resistance between such electrodes.
REFERENCES:
patent: 5141777 (1992-08-01), Frentzel et al.
patent: 5740010 (1998-04-01), Devoe et al.
patent: 5837119 (1998-11-01), Kang et al.
Wada et al., "A New Circuit Substrate for MCM-L," ICEMCM '95, pp. 59-64, 1995.
Nakamura et al., "Advanced LSI Package Using Stud-Bump -Bonding Technology < CSP (CHip Size Package)>," ICEMCM '95, pp. 302-307, 1995.
Aday et al., "A Comparative Analysis of High Density PWB Technologies", ICEMCM '96 Proceedings, pp. 239-244.
Tanaka et al. "A Fine-Pitch Lead-Less-Chip Assembly Technology With The Built-Up PCB", ICEMCM '96 Proceedings, pp. 369-374.
Matsuda et al., "Simple Method For Flip-Chip Bonding On A Resin Substrate", 1997 International Conference on Multichip Modules, pp. 92-97.
Nakamura et al., "Advanced LSI Package Using Stud-Bump-Bonding Technology < CSP (Chip Size Package)>", ICEMCM '95, pp. 302-307.
Tomura et al., "Chip-On-Board Mounting Technology Using Stud-Bump-Bonding Technique", National Technical Report, vol. 39, No. 2, Apr. 1993, pp. 90-97.
Kusagaya et al., "Flip Chip Mounting Using Stud Bumps and Adhesives For Encapsulation", ICEMM Proceedings '93, pp. 238-246.
Wada et al., "A New Circuit Substrate For MCM-L", ICEMCM '95, pp. 59-64.
Amano Yasuo
Asada Toyoki
Kanda Naoya
Matsumoto Kunio
Narikawa Yasuhiro
Hardy David
Hitachi , Ltd.
Warren Matthew E.
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