Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Coating selected area
Reexamination Certificate
2000-09-07
2004-02-17
King, Roy (Department: 1742)
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Coating selected area
C205S118000, C205S176000, C205S181000, C205S182000
Reexamination Certificate
active
06692629
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to semiconductor fabrication technology, and more particularly, to a flip-chip bumping method for fabricating solder bumps on a semiconductor wafer for flip-chip application.
2. Description of Related Art
The flip-chip technology is an advanced semiconductor fabrication technology that allows the overall package size to be made very compact. The flip-chip package configuration differs from conventional ones particularly in that the semiconductor chip is mounted in an upside-down manner on a substrate and electrically coupled to the same by means of solder bumps provided on the active surface of the semiconductor chip. Since no bonding wires are required, the overall size of the flip-chip package can be made very compact as compared to conventional types of package configurations.
The attachment of solder bumps to a flip chip requires the provision of the so-called UBM (Under Bump Metallization) pads on the active surface of the flip chip, which is wettable to the solder bumps so that the solder bumps can be securely attached to the flip chip.
A great variety of patented technologies have been proposed for the fabrication of UBM pads on a flip chip. A few of these patented technologies are listed in the following:
U.S. Pat. No. 5,904,859 entitled “FLIP CHIP METALLIZATION”;
U.S. Pat. No. 5,902,686 entitled “METHODS FOR FORMING AN INTERMETALLIC REGION BETWEEN A SOLDER BUMP AND AN UNDER BUMP METALLURGY LAYER AND RELATED STRUCTURES”;
U.S. Pat. No. 6,015,652 entitled “MANUFACTURE OF FLIP-CHIP DEVICE”;
U.S. Pat. No. 5,137,845 entitled “METHOD OF FORMING METAL CONTACT PADS AND TERMINALS ON SEMICONDUCTOR CHIPS”
U.S. Pat. No. 5,773,359 entitled “INTERCONNECTION SYSTEM AND METHOD OF FABRICATION”,
U.S. Pat. No. 5,736,456 entitled “METHOD OF FORMING CONDUCTIVE BUMPS ON DIE FOR FLIP CHIP APPLICATIONS”;
U.S. Pat. No. 4,927,505 entitled “METALLIZATION SCHEME PROVIDING ADHESION AND BARRIER PROPERTIES”;
U.S. Pat. No. 5,903,058 entitled “CONDUCTIVE BUMPS ON DIE FOR FLIP CHIP APPLICATION”.
In general, there are three different technologies for UBM fabrication: sputtering UBM technology, evaporation UBM technology, and electroless plating UBM technology. In terms of cost-effectiveness, the electroless plating UBM technology is mostly preferable to use since the required process steps are least complex.
One drawback to the use of the electroless plating UBM technology, however, is that the subsequent forming of solder bumps on the resulted UBM layers van be implemented only through printing technology, which is considerably complex in process steps and thus cost-ineffective to use. Moreover, the use of the electroless plating UBM technology would exclude the use of gold (Au), tin/lead (Sn/Pb), or copper (Cu), so that its utilization is limited.
SUMMARY OF THE INVENTION
It is therefore an objective of this invention to provide a flip-chip bumping method for fabricating solder bumps on a semiconductor wafer for flip-chip application, which allows the fabrication of UBM layers and the fabrication of solder bumps to be both implemented through plating.
It is another objective of this invention that the provided flip-chip bumping method can be more cost-effective to implement than prior art.
In accordance with the foregoing and other objectives, the invention proposes a flip-chip bumping method for fabricating solder bumps on a semiconductor wafer for flip-chip application.
The flip-chip bumping method of the invention is proposed for use on a semiconductor wafer predefined with a plurality of chip regions which are delimited from each other by a predefined cutting line and each of which is formed with a plurality of aluminum or copper based bond pads.
The flip-chip bumping method of the invention comprises the following steps: (1) forming a plating bus over and along the cutting line and connected to each bond pad; (2) performing a UBM fabrication process, wherein a first plating electrical current is applied through the plating bus to each bond pad for fabricating a UBM layer over each bond pad through plating; and (3) performing solder-bump fabrication through a plating process, wherein a second plating electrical current is applied through the plating bus to each bond pad for plating a selected solder material over the UBM layer on each bond pad to thereby form a solder bump over the UBM layer on each bond pad.
The flip-chip bumping method of invention is distinguishable from the prior art particularly in that it allows the UBM fabrication and the solder-bump fabrication to be both implemented through plating. Since plating is considerably lower in cost than sputtering and etching, the flip-chip bumping method of the invention can be more cost-effective to implement than the prior art.
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Yung, E.K; Tulik, I., Electroplated Solder Joints for Flip-Chip Applications, Sep. 1991, IEEE Transactions on Components, Hybrids, and Manufacturing Technology, vol. 14, No. 3, pp. 549-559.*
Salonen, J.; Salmi, J., A Flip Chip Process Based on Electroplated Solder Bumps, Jun. 1994, Physica Scripta, vol. T54, pp. 230-234.*
Lin, Kwang-Lung; Chang, Shiuh-Yuan, Approaching a Uniform Bump Height of the Electroplated Solder Bumps on a Silicon Wafer, IEEE Transactions on Components, Hybrids, and Manufacturing Technology, vol. 19, No. 4, Nov. 1996, pp. 747-751.
Chen Chih-Shun
Chien Feng-Lung
Chiu Shih-Kuang
Yang Ke-Chuan
Yuan Po-Hao
Corless Peter F.
Edwards & Angell LLP
Jensen Steven M.
King Roy
Leader William T.
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