Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2002-07-19
2003-11-11
Elms, Richard (Department: 2824)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S735000, C438S109000
Reexamination Certificate
active
06646335
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor apparatus, and more particularly to a semiconductor apparatus such that the electrical properties have been improved using thin wiring with a substantially symmetric wiring pattern with respect to the semiconductor chip, production is easy, and it is possible to improve heat radiation while being compact.
BACKGROUND OF RELATED ART
In recent years, accompanying a demand for more compact, higher performance electronic equipment, semiconductor apparatuses with multiple pins yet being compact have been sought through larger scale integration of semiconductor chips themselves. In addition, accompanying the demand for greater compactness and higher performance, greater compactness and higher performance of semiconductor apparatuses have been targeted by using multi-chip packages (MCPs) in which a plurality of semiconductor chips are arranged inside a single package. As an apparatus targeting the above-described compactness and multiple pin features, a semiconductor apparatus has been proposed for example in Japanese Laid-Open Patent Publication 6-334098. As shown in FIG.
11
and
FIG. 12
, this semiconductor apparatus
110
is formed by joining a heat radiation plate
117
and a flexible wiring board
116
, joining a package main body
112
composed of a multilayer printed circuit board on the surface opposite that of the joined area of the heat radiation plate
117
, and bending back the flexible wiring board
116
that extends to the outside of the package main body
112
and joining this board to the surface side where a cavity
115
in the package main body
112
has been formed. As shown in
FIG. 12
, a semiconductor apparatus formed in this manner is composed such that heat radiating fins
117
a
are already attached to the heat radiating board
117
, and lead pins are joined as an external connection terminal
118
via the circuit board
116
a
such as the printed circuit board, to the outer surface of the flexible wiring board
116
joined to the package main body
112
.
In addition, among the above-described multi-chip packages in which a plurality of semiconductor chips are arranged within a single package, there are flat MCPs in which the plurality of semiconductor chips are lined up in a planar surface, and stacked MCPs in which the plurality of semiconductor chips are stacked in the direction of thickness. Flat MCPs in which the-semiconductor chips are lined up in a planar surface require a large mounting surface area, and hence contribute little to increasing the compactness of electronic equipment. Consequently, development of stacked MCPs in which the semiconductor chips are stacked is being conducted in abundance. As an example, there is technology, such as that disclosed in Japanese Laid-Open Patent Publication 6-204399 and Japanese Laid-Open Patent Publication 8-167630, wherein modules are formed by stacking semiconductor chips vertically after sealing such inside a package, and electrical connection between packages is accomplished using via holes and through holes.
However, in the aforementioned semiconductor apparatus of Japanese Laid-Open Patent Publication 6-334098, assembly is complicated because the apparatus is produced joining the package main body
112
, in which a cavity
115
is formed and printed boards having a set wiring pattern formed in advance are stacked up to one side of the flexible printed circuit board
116
, creating the problem that the result effectively cannot be made compact.
In addition, with a conventional stacked MCP, it is necessary to form via holes and through holes for accomplishing inter-layer connection in order to electrically connect the semiconductor chips and the wiring board, and hence production processes, such as positioning between layers, processing holes, filling holes with a conductor or plating process, are difficult. Consequently, apparatuses have been proposed in which the semiconductor chips are mounted on an insulating film tape in which copper wiring has been provided without using complex production processes such as for via holes and through holes and the like, and the stacked semiconductor chips are electrically connected, for example Japanese Laid-Open Patent Publication 8-167630. In a semiconductor module comprising at least a single semiconductor chip, a substrate on which such is mounted, and wiring electrically connected to said semiconductor chip formed on this substrate, multi-layering is accomplished by folding the above-described substrate, and the space between layers of said substrate are adhered by an adhesion means. In addition, between the folded layers, a heat dispersion board is placed and heat is dispersed. In addition, it is noted that between the folded layers, a board is placed to secure rigidity, the rigidity of the semiconductor module is increased, rising of solder balls through deformations such as flexing is prevented, and the electrical connection between the semiconductor module and the wiring board is made certain. However, in that disclosure, the board is folded from the area of the ridge folding lines and the valley folding lines to accomplish multi-layering, and furthermore, a semiconductor chip is placed within the same empty space as the valley folding lines area, while within this empty space, the active surfaces of the semiconductor chips are positioned facing each other. Consequently, the substrate is such that with the ridge folding lines, enlargement becomes necessary because of the fear that breaking of the wiring or the like could arise if the bending radius is reduced, and in addition, because these ridge folding lines exist in a plurality of locations, the semiconductor module becomes thick. Moreover, the heat generated from the mutually facing semiconductor chips acts on each, and furthermore, the temperature is raised and abnormal operation occurs in the semiconductor chips, and eventually, abnormalities are caused in the semiconductor modules as a result of this. In particular, when the active surfaces of the semiconductor chips are placed in positions facing each other, this heat acts mutually and abnormal operations occur easily. For this reason, in said disclosure a heat dispersion board is placed between the semiconductor chips and the heat is dispersed, but because this is placed in contact with the active surfaces, there is no change in the mutual action of the heat generated by the semiconductor chips via the heat dispersion board, the temperature does not go down enough, so the temperature rises and abnormal operation is caused in the semiconductor chip, while the problem also remains that the package is large.
DISCLOSURE OF THE INVENTION
In consideration of the foregoing, it is an objective of the present invention to provide a semiconductor apparatus wherein a semiconductor chip and an interposer are both placed besides each other on a carrier tape, and in which the electrical properties are improved using short wiring with a wiring pattern substantially symmetric with respect to the semiconductor chip, production is easy, and which is compact with improved heat radiation. In addition, it is another objective of this invention to obtain a semiconductor apparatus in which the used surface area is reduced using carrier tape on which electronic parts are mounted, and accompanying that, the exterior dimensions of the package as a whole can be reduced, the mounting area can be shrunk, the ease of operation and productivity can be improved and the production cost can be lowered.
In order to accomplish the above objectives, the semiconductor apparatus of the present invention is such that a semiconductor chip connected electrically to wiring formed on a carrier tape, and an interposer provided on the carrier tape and near said semiconductor chip, are provided beside each other, the semiconductor chip and the interposer are overlapped by bending the carrier tape so that the semiconductor chip positioned in the center is enclosed, and the result is covered by a molding.
The present inventio
Elms Richard
Oliff & Berridg,e PLC
Seiko Epson Corporation
Wilson Christian D.
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