Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2007-11-06
2007-11-06
Auve, Glenn A. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C370S389000, C370S467000, C710S107000
Reexamination Certificate
active
11291279
ABSTRACT:
At an ingress point to a shared transaction infrastructure, for example a shared PCI Express infrastructure, an entry in a segment table maps an address in a transaction packet to a target for the transaction packet. The entry in the segment table identifies one of a plurality of channel descriptors providing one or more of forwarding information for the transaction packet and information for constructing an additional header for the transaction packet.
REFERENCES:
patent: 2005/0188105 (2005-08-01), Reinhard et al.
patent: 2006/0004795 (2006-01-01), Shah et al.
patent: 2006/0114892 (2006-06-01), Han et al.
patent: 2006/0195759 (2006-08-01), Bower
Johnsen Bjørn Dag
Tørudbakken Ola
Auve Glenn A.
Park Vaughan & Fleming LLP
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