Flexible microcontroller architecture

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S309000, C710S315000

Reexamination Certificate

active

06415348

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to microcontroller architectures, and more particularly to a flexible microcontroller architecture for supporting both general embedded applications and communications applications.
2. Description of the Related Art
To achieve superior integrated communications solutions, microcontrollers have recently been designed to target communications applications. Microcontrollers directed to communications applications commonly integrate a universal serial bug (USB) controller and a High-Level Data Link Control (HDLC) controller. An HDLC controller provides support for a number of communication protocols such as HDLC, SDLC, Link Access Procedures Balanced (LAPB), Link Access Procedures on the D-channel (LAPD), and PPP. The channels of an HDLC controller can be selectively coupled to a pulse code modulation (PCM) highway, a general circuit interface (GCI), an ISDN-oriented modular interface revision 2 (IOM-2) serial bus, a data carrier equipment (DCE) serial interface, and other general and specific interfaces that often use packetized communication. A microcontroller supporting an HDLC controller and USB controller can be used for a broad range of communications applications, including ISDN terminal adapters, low-end routers, digital subscriber line (DSL) modems, USB peripherals, PBX applications, digital phones, digital loop carriers, and key telephone systems.
Some communications microcontrollers have also been designed to target a specific communications application. For example, a microcontroller providing a USB peripheral controller, but not an HDLC controller, has been designed to support communications-oriented peripherals typically found in a computer system environment, such as a DSL modem, for example. As another example, a microcontroller providing an HDLC controller, but not a USB peripheral controller, has been designed for cost-sensitive telecom applications such as linecards and digital phones.
Certain other microcontrollers (which might be termed “general microcontrollers”) integrate system peripherals to serve the common requirements of embedded products in general, such as those in office automation, mass storage, and the communications market. Some specific embedded applications, for example, include disk drives, hand-held and desktop terminals, set-top controllers, fax machines, printers, photocopiers, feature phones, cellular phones, PBXs, multiplexers, modems and industrial controls. The system peripherals in microcontrollers targeting these types of applications have included an interrupt control unit, a timer control unit, a direct memory access (DMA) unit, a bus interface unit ( BIU), a chip select unit, asynchronous serial ports, and an execution unit. This variety of microcontrollers has serviced control applications, communication applications, and other embedded applications. However, compared to communications microcontrollers, general microcontrollers have not integrated communications-oriented controllers, such as an HDLC controller or a USB controller, which are gaining importance for communications applications. Compared to general microcontrollers, communications microcontrollers either lack the capability or provide a limited capability to support peripherals suitable for other embedded areas.
Both general microcontrollers and communications microcontrollers have lacked the architectural flexibility to effectively serve both the general embedded market and the communications market.
SUMMARY OF THE INVENTION
Briefly, a microcontroller provides a flexible architecture to readily support both general embedded applications and communications applications. The microcontroller includes an embedded processor, a relatively low-speed general purpose peripheral bus controller, a relatively high-speed peripheral bus host bridge, a primary memory controller, and a secondary memory controller, each coupled to a processor bus. The general purpose peripheral bus controller is coupled to a relatively low-speed general purpose peripheral bus which is coupled to a plurality of integrated general purpose peripherals. The relatively high-speed peripheral bus host bridge is coupled to a relatively high-speed peripheral bus capable of supporting a plurality of communication-oriented and other peripherals. The secondary memory controller shares an address bus with the general purpose peripheral bus controller and shares a data bus with either the primary memory controller or the general purpose peripheral bus controller. The control timing of the secondary memory controller is independent of the control timing of the general purpose peripheral bus controller. Also, a processor arbiter is coupled to the embedded processor, and a relatively high-speed peripheral bus arbiter is coupled to the peripheral bus host bridge.
An embedded system utilizing this flexible microcontroller can include a relatively low-speed general purpose peripheral bus and a relatively high-speed peripheral bus, both external to the microcontroller. The external relatively low-speed general purpose bus can be coupled to the relatively low-speed general purpose peripheral bus controller, and the external relatively high-speed peripheral bus can be coupled to the relatively high-speed peripheral bus host bridge.


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