Flexible interconnect pattern on semiconductor package

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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C438S611000, C257SE21499

Reexamination Certificate

active

07915081

ABSTRACT:
An embodiment of the present invention is a technique to fabricate a metal interconnect. A first metal trace is printed on a die attached to a substrate or a cavity of a heat spreader in a package to electrically connect the first metal trace to a power contact in the substrate. A device is mounted on the first metal trace. The device receives power from the substrate when the package is powered.

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patent: 6790706 (2004-09-01), Jeung et al.
patent: 7443019 (2008-10-01), Bauer et al.
patent: 2004/0227238 (2004-11-01), Hashimoto

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