Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
1999-12-29
2001-03-13
Bragdon, Reginald G. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S133000, C711S144000, C711S154000
Reexamination Certificate
active
06202132
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to caching and more particularly to an improved cache architecture that enables the implementation of custom-specific and/or item-specific cache-coherency and cache-replacement policies. It can be used for software caches (e.g., file caches or server caches) as well as hardware caches.
BACKGROUND OF THE INVENTION
For the future, it is envisioned that local networks will be called upon to serve from thousands to hundreds of thousands of resource-poor clients. These networks might be intra-building, intra-organization or even intra-city. Customizable and nevertheless extremely high performing servers will be required. These servers will heavily rely on caching. The hit server/miss server architecture described in the aforementioned co-pending patent application entitled “A Powerful And Flexible Server Architecture” is one example. The server architectures need basic cache-coherency mechanisms that permit efficient and simple implementation of application-specific cache-coherency and cache-replacement policies, preferably on a per item basis.
A huge variety of cache-coherency and cache-replacement policies is known, including the MESI (Modified, Exclusive, Shared, Invalid) protocol, which is mostly used for hardware cache memories, and lazy release consistency, which is mostly used for distributed-shared-memory systems implemented by software.
What is needed is a set of general basic mechanisms that enable one to implement virtually any (known or new) cache-coherency and/or cache-replacement policy. The basic mechanisms can be implemented by software, by hardware, or by a combination of both.
SUMMARY OF THE INVENTION
A cache system in accordance with the present invention consists of one or more cache components and a set of one or more consistency-replacement functions. A cache component caches one or more items in its one or more cache entries. Items that hit in the cache can result in corresponding cache entries being read or written. Any valid entry in a cache component includes status information reflecting whether the entry has been accessed and whether it has been modified. Furthermore, any valid entry is linked to a consistency-action matrix that, in correspondence with the entry's status information and access type, (i.e. read or write) determines what consistency action has to be executed in conjunction with the current entry access. Consistency actions and the consistency-action matrix are the inventive mechanisms for implementing cache-coherency and cache-replacement policies.
Any valid entry in a cache is linked to an appropriate consistency-replacement function that implements one or more consistency and/or replacement policies. Consistency-replacement functions are application-specific and are implemented by means of the consistency-action matrix.
REFERENCES:
patent: 5119485 (1992-06-01), Ledbetter, Jr. et al.
patent: 5809536 (1998-09-01), Young et al.
patent: 5960457 (1999-09-01), Skrovan et al.
patent: 5987571 (1999-11-01), Shibata et al.
Islam Nayeem
Jaeger Trent Ray
Liedtke Jochen
Panteleenko Vsevolod V.
Bragdon Reginald G.
Dougherty Anne Vachon
Ellenbogen Wayne L.
International Business Machines - Corporation
Tran Denise
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