Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Reexamination Certificate
2002-04-10
2004-11-09
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
C710S010000, C710S013000, C710S104000, C709S220000, C709S221000, C709S222000, C713S001000, C713S002000, C713S100000
Reexamination Certificate
active
06816918
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method and apparatus of selectively configuring a network device using an Electrically Erasable Programmable Read Only Memory (EEPROM). More specifically, the method and apparatus allows for the use of dynamic configuration settings in the EEPROM interface that increases flexibility, has fewer limitations and is a low cost alternative.
2. Description of Related Art
Many types of network devices are necessary to allow an network to function properly. These network devices are composed of chips, with these chips allowing for the control and monitoring of data through the network device. Chip vendors may pre-set some register default values inside a network device, such as a switch/hub chip, to provide a low cost switch and hub application. That means it is not necessary for system integrators to change the internal register default values to build a workable system. The preconfigured chips allow for the network devices to be setup and to function quickly for a majority of system integrators.
Sometimes, these pre-set register default values might not suitable for some system integrators. Chip vendors should provide some methods so that system integrators can change some register values instead of using default values. Some chip vendors will provide a microprocessor interface (SPI, I2C, or PCI) to allow system integrators to change all write-able register. However, built-in microprocessors on the chip boards increase system costs and may not be needed by many customers.
Another alternative method to allow users to change the default values is to provide an Electrically Eraseable Programmable Read Only Memory (EEPROM) interface. With an EEPROM interface, a system integrator can change some register default values using a very low cost EEPROM. Most of chip vendors have provided an EEPROM interface for a low cost switch and hub application.
FIG. 1
provides as an example of a low cost pre-programmed EEPROM that is used to change some default values of a network switch/hub chip. When the external control signal (RESET) goes to in-active, network switch/hub chip start to change its some register default values via downloading the contents of EEPROM. And then network switch/hub chip start its normal operation after the download phase had been finished.
When the RESET signal goes to in-active, network switch/hub chip start to fetch data from external EEPROM automatically. Most of the network switch/hub chips will fetch data from EEPROM address
00
h (the first entry), and fetch the other data in sequence. In order to change some register default values or set chip configuration, the chip vendor will provide a register set (a part of chip register file) which are downloadable from EEPROM. Each entry of EEPROM is pre-defined and will directly map to one (or some) entry of register set inside network switch/hub chip as described in FIG.
2
.
However, in this kind of scenario, two major drawbacks may occur. First, different system integrators may want to change different registers. And it is not necessary for system integrators to configure all downloaded register. However, even if system integrators only want to configure some of chip downloadable registers, it is still necessary to fill all the contents of downloadable register set into EEPROM. Secondly, some register default values of network switch/hub chip are change-able via microprocessor interface, but they are not downloadable via EEPROM. In this case, the only way for system integrator to act is to build a microprocessor on his PCB instead of using a very low cost EEPROM.
Thus, there is a need for a mechanism and a process to be used with a network device that allows for a system integrator to make changes to default settings of the network device that is not costly or cumbersome. Additionally, there is also a need such a mechanism to change only certain defaults on a network device without the limitations imposed by the prior art processes and devices.
SUMMARY OF THE INVENTION
It is an object of this invention to overcome the drawbacks of the above-described conventional network devices and methods. The present invention provides for a new approach for chip vendors to provide system integrators a dynamic configuration using low cost EEPROM. With this approach, system integrators will have flexibility to change the default values of all configure-able registers inside a network device, such as a switch/hub chip.
According to one aspect of this invention, a method for flexibly configuring default values of a network device through an EEPROM interface. A header is received from an EEPROM through the EEPROM interface and it is determined from the header whether any default value of the network device should be updated. At least one configuration instruction is fetched from the EEPROM when it is determined that the network device should be updated. The at least one configuration instruction is interpreted and a register default value of the default values corresponding to the interpreted at least one configuration instruction is changed.
Additionally, the method can include monitoring a reset signal to determine whether the default values of the network device should be updated. In addition, the method can also determine the number of default values of the network device need to be updated. Also, in determining whether any default value of the network device should be updated includes determining a key value from the header and comparing the key value with a magic number pre-defined inside network device to determine whether any default value of the network device should be updated. The at least one configuration instruction can also be a plurality of configuration instructions and the step of fetching at least one configuration instruction from the EEPROM can be repeated until all of the plurality of configuration instructions have been fetched.
In another aspect of the invention, a network device, having default values, that is flexibly configurable, is also disclosed. The device includes an EEPROM interface, a register file containing the default values for the network device and a configuration instruction interpreter. The EEPROM interface is configured to receive configuration instructions, with each configuration instruction of the configuration instructions being composed of an address index and a corresponding value and wherein the configuration instruction interpreter is configured to interpret the received configuration instructions such that the corresponding values are mapped corresponding default values of the register file.
Also, the network device may have a configuration instruction interpreter that is configured to monitor a reset signal to determine if the default values should be updated. The configuration instruction interpreter may also be configured to receive a header from the EEPROM interface containing a key value from and configured to compare the key value with a pre-defined magic number to determine whether any default value of the default values should be updated. Similarly, the configuration instruction interpreter may be configured to repeatedly fetch configuration instructions from the EEPROM until all of the configuration instructions have been fetched.
These and other objects of the present invention will be described in or be apparent from the following description of the preferred embodiments.
REFERENCES:
patent: 5423015 (1995-06-01), Chung
patent: 5644784 (1997-07-01), Peek
patent: 5727126 (1998-03-01), Eichfeld et al.
patent: 5727207 (1998-03-01), Gates et al.
patent: 5781796 (1998-07-01), Lee
patent: 5794033 (1998-08-01), Aldebert et al.
patent: 5909686 (1999-06-01), Muller et al.
patent: 6061351 (2000-05-01), Erimli et al.
patent: 6199192 (2001-03-01), Marquez et al.
patent: 6292848 (2001-09-01), Plyler et al.
patent: 6407960 (2002-06-01), Egbert et al.
patent: 99/00936 (1999-01-01), None
Ian Page, “Reconfigurable Processor Architectures,” Microprocessors and Microsystems, IPC Business Press Ltd., London,
Tseng Weu-Cheng
Yeh Hsin-Min
Broadcom Corporation
Gaffin Jeffrey
Sorrell Eron
Squire Sanders & Dempsey LLP
LandOfFree
Flexible apparatus for setting configurations using an EEPROM does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Flexible apparatus for setting configurations using an EEPROM, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flexible apparatus for setting configurations using an EEPROM will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3330793