Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
1999-08-23
2003-02-11
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S209000, C711S210000, C711S158000, C711S163000
Reexamination Certificate
active
06519690
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a computer system addressing architecture, and more particularly to an addressing architecture which allows mapping a single memory address space onto multiple physical devices limiting the mapping to the addressability of the physical device.
2. Description of the Related Art
Many computer systems provide the ability to address physical devices by assigning address ranges to each device. Operating systems and application software access system memory and other addressable devices by writing to or reading from an address in memory space. Other devices are accessed through reading and writing special addresses or “ports” defined in an I/O address space. An example of the former is the boot ROM; an example of the latter are modems.
In the conventional computer system, each device is typically defined at a fixed range of addresses in either memory or I/O address space, assigned by either an industry standard or a specific manufacturer. Typically, the system ROM is addressed in the 640K region immediately below 1M. Below that, systems reserve space for BIOS extensions and video RAM. Old memory management systems such as Expanded Memory Specification (EMS) used holes left in this 640K to 1M space for mapping accesses to regions above the 1M line.
Conventional memory controllers define a “hole” into which ROMs can be mapped. Other conventional controllers allow defining attributes for certain fixed regions of memory.
Early memory controllers provided mechanisms for defining a hole in a block of RAM into which the system ROM could be addressed. More modern conventional controllers shadow (or copy) ROM code and data into that 640K to 1M space in RAM for performance reasons. However, modem controllers still provide the capability to define a hole in RAM for similar purposes. For example, one modem chip set allows defining a hole at either 512K-640K or 15M-16M. A problem with these conventional systems is that the ability to define these holes is limited to fixed specific address ranges.
A second limitation in conventional systems is the ability to define attributes to control access to certain regions of memory space. Some conventional memory controllers allow defining attributes such as write-only, read-only, and non-cacheable to a set of fixed address regions of RAM. Conventional systems typically do not flexibly define attributes to arbitrary memory regions or to ROM. Conventional systems also typically do not define areas to prevent code execution.
In a conventional system, an address which exceeds the upper limit of the addressability of a target device is typically wrapped so that addresses at the beginning of the address space are used instead. This wrapping is not always desirable.
SUMMARY OF THE INVENTION
In a system according to the preferred embodiment, a microcontroller contains an address decoder mechanism for mapping addresses in a memory address space and an I/O address space to memory and non-memory resources. The address decoder provides a number of programmable address registers for controlling a programmable address mapper. The programmable address registers and programmable address mapper provide for a flexible mechanism for assigning devices to a particular address in an address space, allowing defining attributes for controlling access to a region of address space, without requiring complicated programming. If the programmable address register specifies a region that extends beyond the maximum addressable location of the resource, the region is truncated rather than wrapping to the beginning of the resource's addressable locations.
The mechanism can provide improved flexibility in mapping devices into memory and I/O space, such as providing flexibility to overlay devices onto memory ranges and mask out the corresponding region of RAM, which would be useful to help configure multiple devices.
REFERENCES:
patent: 5751991 (1998-05-01), Leach et al.
patent: 6012135 (2000-01-01), Leedom et al.
ELAN™SC400 and Elan SC410 Single-Chip Low-Power PC/AT-Compatible Microcontrollers, Data Sheet, Advanced Micro Devices, Inc., Dec. 1998, pp. 1 through 132.
The Elan™ SC410 Microcontroller, Product Brief, Advanced Micro Devices, Inc., © 1999, 3 pages, http://www.amd.com/products/lpd/elan410/21328a.html.
AMD Chipset Product Overview: AMD-640™ Chipset, Advanced Micro Devices, Inc., © 1999, 5 pages, http://www.amd.com/products/cpg/chipset.21343a.html.
AM186™ CC High-Performance, 80C186-Compatible 16-Bit Embedded Communications Controller, Data Sheet, Advanced Micro Devices, Inc., Jun. 1998, pp. 1 through 100.
80960CA-33,-25,-16-, 32-Bit High-Performance Embedded Processor, ©Intel Corporation, 1993, table of contents and pp. 1 through 46.
The Indispensable PC Hardware Book: Your Hardware Questions Answered, Third Edition, by Hans-Peter Messmer, copyright © Addison Wesley Longman 1997, title page and pp. 614 through 630.
Advanced Micro Devices , Inc.
Akin Gump Strauss Hauer & Feld & LLP
Anderson Matthew D.
Kim Matthew
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