Flat-top bumping structure and preparation method

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S614000

Reexamination Certificate

active

06784089

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to bumping structures for making an electrical connection, and more particularly to bumping structures having a flat top and methods of preparing the same.
BACKGROUND OF THE INVENTION
As the number of users of visual interfaces such as notebooks, video and digital cameras, electronic dictionaries, pagers, personal digital assistants, and visual display units are rapidly increasing, smaller and lighter weight products are required. Liquid crystal display technology is one of the promising technologies for meeting the smaller size and lighter weight requirements of future products. Traditional ways of mounting the driver chips to the liquid crystal display panels including the seal and zipper strip connector methods. Another approach is the tape automatic bonding which has the benefit of handling finer pitch and savings in package size. But the tape carrier package is expensive. Another mounting technology called “chip on glass” has emerged as a better and more cost-effective means of mounting driver chips to the liquid crystal display panel with the highest possible packing density.
In the chip on glass technology, one of the more important problems to solve is how to consistently obtain a good connection between the chip anisotropic conductive film and glass substrate. With respect to the bumping process, a flat-top gold bump is one of the best solutions today. However, traditional gold bump processing methods don't always produce a flat-top surface. Unflat-top bump surfaces do not provide good electrical contact.
FIGS. 1A-E
illustrate a prior art method of making a semiconductor device having a bump with a flat engagement surface.
FIG. 1A
illustrates a method of providing a semiconductor device
10
including a substrate portion
12
having a silicon base portion
14
and connectivity portion
16
including a plurality of alternating inter-level dielectric layers and metallization layer is a manner known to those skilled in the art. One of the metallization layers may provide a bond pad
18
on an upper surface of the substrate
12
. A passivation layer
20
such as silicon dioxide, silicon nitride, or silicon oxy-nitride may be provided overlying the substrate and includes an opening
22
therein exposing at least a portion of bond pad
18
.
FIG. 1B
illustrates a method of providing a photoresist layer
24
having an opening
26
therein and aligned with the bond pad
18
and depositing an under bump metallurgy
28
over the bond pad
18
and through the opening
26
. Alternatively, it is known to those skilled in the art to deposit the under bump metallurgy over the entire surface of the substrate and thereafter deposit the first passivation layer
24
so that the opening
26
is still aligned with the bond pad
18
.
FIG. 1C
illustrates a method of removing the first photoresist layer
24
and depositing a second photoresist layer
30
having an opening
32
therein perfectly aligned with a selected portion of the under bump metallurgy
28
and bond pad
18
. When the opening
32
in the second photoresist layer
30
is perfectly aligned with the under bump metallurgy
28
, an inner wall
31
of the second photoresist layer
30
defining the opening in
32
is flush with and is in the same plane as an inner wall
29
of the under bump metallurgy
28
.
Thereafter, as shown in
FIG. 1D
, gold
34
is deposited through the opening
32
in the second photoresist layer
30
and onto the under bump metallurgy
28
. As shown in
FIG. 1E
, the second photoresist layer
30
is then removed to produce a bump structure
34
having an upper engagement surface
36
which is flat.
However, as shown in
FIG. 2A
, the second photoresist layer
30
may be positioned so that the opening
32
is not perfectly aligned with the under bump metallurgy
28
in that the inner wall
31
of the second photoresist layer
30
and the inner wall
29
of the under bump metallurgy
28
are not flush and are not in the same plane. The misalignment can be caused by a number of different manufacturing problems including, for example but not limited to, the opening
32
being too small or too large, or the opening
32
not being aligned or registered properly with the appropriate portions of the underlying under bump metallurgy
28
and bond pad
18
. As shown in
FIG. 2B
, when the gold
34
is electroplated through the opening
32
of the second photoresist layer
30
the gold is deposited in a manner following the topography of the under bump metallurgy
18
including the raised portions
38
that are formed over the portion of the passivation layer
20
covering the bond pad
18
. When the second photoresist layer
30
is stripped, a bump structure
34
is provided having an upper surface
36
including raised portions or horns
40
. The raised portions or horns
40
of the bump structure
34
do not allow for good electrical contact between the upper surface
36
of the bump structure
34
and another electrical component.
SUMMARY OF THE INVENTION
One embodiment of the invention includes a method of making an electrical contact bump structure on a substrate including providing a substrate having a bond pad, and a passivation layer overlying a portion of the substrate and wherein the passivation layer includes an opening therein exposing a portion of the bond pad, and wherein the passivation layer has a raised portion overlying the bond pad. Forming an under bump metallurgy over at least the exposed portion of the bond pad and over at least a portion of the raised portion of the passivation layer overlying the bond pad. Forming a sacrificial blanket having an opening therein that in cross-section has an inverted T-shape over the substrate so that the opening in the sacrificial blanket is aligned with the bond pad. Depositing an electrically conductive material into the opening in the sacrificial blanket so that the electrically conductive material overlies at least a portion of the under bump metallurgy including a portion of the under bump metallurgy overlying the raised portion of the passivation layer and so that a bump structure is formed having a flat-top engagement surface that is free of any raised portion.
Another embodiment of the invention further includes removing the sacrificial blanket.
Another embodiment of the invention further includes etching back any excess portion of the under bump metallurgy using the bump structure as a mask.
In another embodiment of the invention the forming of the sacrificial blanket includes forming a first photoresist layer and forming an opening in the first photoresist layer, forming a second photoresist layer over the first photoresist layer and forming an opening in the second photoresist layer aligned with the opening in the first photoresist layer so that the opening in the first photoresist layer is larger than the opening in the second photoresist layer and so that the opening in the first photoresist layer and the opening in the second photoresist layer together form an opening through the first photoresist layer and second photoresist layer that in cross-section has an inverted T-shape.
In another embodiment of the invention the forming of the sacrificial blanket having an opening therein that in cross-section has an inverted T-shape and over the substrate so that the opening in the sacrificial layer is aligned with the bond pad includes forming a first photoresist layer over the substrate, exposing a portion of the first photoresist layer to ultraviolet light, and forming a second photoresist layer over the first photoresist layer and exposing a portion of the second photoresist layer to ultraviolet light so that the exposed portion of the second photoresist layer smaller than the exposed portion of the first photoresist layer, and removing the exposed portions of the first photoresist layer and the second photoresist layer to provide an opening through the first photoresist layer and the second photoresist layer that in cross-section has an inverted T-shape.
In another embodiment of the invention

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