Flat panel display device

Details Flat panel display device Flat panel display device

2005-08-09

2005-08-09

Schillinger, Laura M (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S310000, C257S382000

Reexamination Certificate

active

06927464

ABSTRACT:
A method of manufacturing a flat panel display device using fewer masks and resulting in a device with high brightness is disclosed. The resulting devices includes at least first to fourth thin film transistors, the first, third, and fourth thin film transistors having a first conductive type, and the second thin film transistors having a second conductive type. The method includes: a) providing a substrate having a non-display region on which the first thin film transistor and the second thin film transistor are formed, and a display region on which the third thin film transistor and the fourth thin film transistor are formed; b) forming first to fourth semiconductor layers of the first to the fourth thin film transistors on the substrate; c) forming a gate insulating layer over the whole surface of the substrate; d) forming first to fourth conductive patterns and a pixel electrode on the gate insulating layer, the first to fourth conductive patterns formed over the first to fourth semiconductor layers, the pixel electrode formed over a portion of the display region; e) forming first to fourth gate electrodes and a fifth conductive pattern, the first to fourth gate electrodes formed on the first to fourth conductive patterns, respectively, the fifth conductive pattern formed on the pixel electrode; f) ion-implanting a first conductive-type high-density impurity into the first, third, and fourth semiconductor layers to form first conductive-type high-density source and drain regions; g) etching the first to fourth conductive patterns using the first to fourth gate electrodes as an etching mask; h) forming a photoresist pattern to expose a portion of the non-display region corresponding to the second semiconductor layer; and i) ion-implanting a second conductive-type high-density impurity into the second semiconductor layer to form second conductive-type high-density source and drain regions.

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