Flat interlayer insulating film suitable for multi-layer wiring

Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means

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438693, 438694, 438697, 438699, H01L 2100

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active

060572426

ABSTRACT:
There is provided a method of fabricating a semiconductor device, including the steps of forming lower wiring layers on a semiconductor substrate, forming a first silicon oxide film by PECVD, forming a second silicon oxide film containing fluorine by PECVD so that the second silicon oxide film covers the first silicon oxide film and further so that portions thereof formed between the lower wiring layers have a top surface lower than a top surface of portions of the first silicon oxide film located on the lower wiring layers, forming a third silicon oxide film by PECVD so that the third silicon oxide film covers the second silicon oxide film and further so that portions of the third silicon film formed between the lower wiring layers have a top surface higher than a top surface of portions of the first silicon oxide film located on the lower wiring layers, the second silicon oxide film having a greater polishing rate than polishing rates of the first and third silicon oxide films, chemically and mechanically polishing the third and second silicon oxide films until a top surface of portions of the first silicon oxide film located on the lower wiring layers appears, and forming a fourth silicon oxide film by PECVD. The above mentioned method provides an interlayer insulating film having a low dielectric constant and a planarized surface suitable for multi-layer wiring.

REFERENCES:
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patent: 5552628 (1996-09-01), Watanabe et al.
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patent: 5703404 (1997-12-01), Matsuura
patent: 5753564 (1998-05-01), Fukada
patent: 5753975 (1998-05-01), Matsuno
T. Usami et al., "Low Dielectric Constant Interlayer Using Fluorine Doped Silicon Oxide", Extended Abstracts of the 1993 International Conference on Solid State Devices and Materials, (1993), pp. 161-163.
M. B. Anand, "VMI Technology Choices-0.4.mu. m and Beyond", SEMI Technology Symposium, Dec. (1994), pp. 179-185.

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