Flash storage device with data correction function

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Details

C711S103000, C714S006130, C714S043000, C714S746000, C714S758000

Reexamination Certificate

active

07921339

ABSTRACT:
A flash controller performs a data correction function while executing a copy back procedure for a flash memory, and the flash memory includes at least one memory unit and a page buffer. The flash controller contains: a transmission buffer, an error correction unit, a correction information register, and a microprocessor. The microprocessor reads out a data from, the page buffer and stores the data into the transmission buffer after producing a read instruction of page copy to the flash memory. The microprocessor controls the error correction unit to check and correct the data in the transmission buffer and calculate a check result. The microprocessor produces a different program command to record the corrected data into the memory unit according to the data error quantity of the check result. Thereby, the present invention can achieve the purpose of improving the flash controller in reliability and access efficiency.

REFERENCES:
patent: 2002/0085419 (2002-07-01), Kwon et al.
patent: 2005/0169057 (2005-08-01), Shibata et al.
patent: 2006/0064537 (2006-03-01), Oshima
patent: 2007/0253250 (2007-11-01), Shibata et al.
patent: 2008/0055989 (2008-03-01), Lee et al.
patent: 2008/0127104 (2008-05-01), Li et al.
patent: 2009/0125671 (2009-05-01), Flynn et al.
Gregori, “On-Chip error correction techniques for new generation flash memories”, Apr. 2003, pp. 602-616.

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