Flash ROM sharing between processor and microcontroller during b

Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration – Loading initialization program

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Details

713 1, 710 10, G06F 906

Patent

active

061548383

ABSTRACT:
A computer system having a processor, a microcontroller, a flash ROM is provided with an address remapper for handling warm-boot events, and an arbiter for selectively assigning the ownership of the flash ROM to either the microprocessor or the microcontroller. The arbiter assigns the flash ROM initially to the microcontroller when power is initially provided to the system. After the flash ROM boots up and checks the integrity of the flash ROM and updates the content of the flash ROM with valid firmware if necessary, the microcontroller releases the flash ROM to the microprocessor to enable the computer system to proceed with the normal boot-up process. In this process, various system self tests are performed. Next, the microprocessor copies or shadows one or more portions of the flash ROM BIOS into a main memory array. After the shadow operation, the processor sets a remap bit to indicate that the ROM BIOS content has been copied into the main memory array. The setting of the remap bit enables the remapper to deflect accesses to the flash ROM. The restarting of the clock signal to the microcontroller to switch the ownership of the flash ROM back to the microcontroller. In the event that the microprocessor needs to regain access to the flash ROM contents, the microprocessor writes to the mailbox register of the arbiter to request access to the flash ROM. The microprocessor waits for a confirmation from the arbiter that the microcontroller is entering an idled mode. Next, the microprocessor halts the clock of the microcontroller. These events cause the microcontroller to float or tristate the signal lines going from the microcontroller to the flash ROM such that the microprocessor can drive the signal lines without any conflict potentials. In this manner, the microprocessor can still access the shared flash ROM after it has booted up. Thus, the system cost is reduced, the system reliability is enhanced, while the system accessibility to the flash ROM after the boot-up period is still preserved.

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