Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-07-19
1998-08-11
Sheikh, Ayaz R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
395737, 711147, 711150, 711151, 711152, G06F 1314
Patent
active
057940541
ABSTRACT:
In accordance with the invention, a computer system is provided with a processor, a flash ROM, a microcontroller and an arbiter for selectively assigning the ownership of the flash ROM to either the microprocessor or the microcontroller. The arbiter assigns the flash ROM initially to the microcontroller when it boots up. After checking the integrity of the flash ROM and updating the content of the flash ROM with valid software if necessary, the microcontroller releases the flash ROM to the microprocessor to enable the computer system to proceed with the normal boot-up process. In this process, various system self tests are performed. Next, the microprocessor shadows one or more portions of the flash ROM BIOS into a main memory array. After the processor successfully boots up, the processor releases the flash ROM back to the microcontroller by writing a command to a mailbox register in the arbiter which places the microcontroller in an idle mode and by restarting the clock generator of the microcontroller. The restarting of the clock signal to the microcontroller to switch the ownership of the flash ROM back to the microcontroller. In the event that the microprocessor needs to regain access to the flash ROM contents, the microprocessor writes to the mailbox register of the arbiter to request access to the flash ROM. The microprocessor waits for a confirmation from the arbiter that the microcontroller is entering an idled mode. Next, the microprocessor halts the clock of the microcontroller. These events cause the microcontroller to float or tristate the signal lines going from the microcontroller to the flash ROM such that the microprocessor can drive the signal lines without any conflict potentials. In this manner, the microprocessor can still access the shared flash ROM after it has booted up. Thus, the system cost is reduced, the system reliability is enhanced, while the system accessibility to the flash ROM after the boot-up period is still preserved.
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Delisle David J.
Le Hung Q.
Compaq Computer Corporation
Etienne Ario
Sheikh Ayaz R.
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