Flash module with plane-interleaved sequential writes to...

Details Flash module with plane-interleaved sequential writes to... Flash module with plane-interleaved sequential writes to...

2011-04-26

2011-04-26

Rutz, Jared I (Department: 2187)

Electrical computers and digital processing systems: memory

Address formation

Generating a particular pattern/sequence of addresses

C711S103000

Reexamination Certificate

active

07934074

ABSTRACT:
A flash memory controller on a PCIE bus controls flash-memory modules on a flash bus. The flash-memory modules are plane-interleaved using interleaved bits extracted from the lowest bits of the logical block index. These plane-interleave bits are split into a LSB and a MSB, with middle physical block bits between the LSB and MSB. A physical sequential address counter generates a physical block number by incrementing the plane-interleave bits before the middle physical block bits, and then relocating the MSB to above the middle physical block bits. This causes blocks to be accessed in a low-high sequence of0, 1, 4096, 4097, 2, 3, 4098, 4099,etc. in the four planes of flash memory. A RAM physical page valid table tracks valid pages in the four planes, while a RAM mapping table stores the plane, block, and page addresses for logical sectors generated by the physical sequential address counter.

REFERENCES:
patent: 6725321 (2004-04-01), Sinclair et al.
patent: 2002/0194451 (2002-12-01), Mukaida et al.

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