Flash memory structure with floating gate in vertical trench

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257316, H01L 29788

Patent

active

061304530

ABSTRACT:
A flash memory cell comprises a substrate having a trench formed below the substrate surface, a vertical bit line or auxiliary gate deposited in the trench below the surface, a drain region formed in the substrate below the bit line, and a split floating gate deposited in the trench below the surface to a depth less than the vertical bit line. The floating gate includes a first vertical portion on one side of the bit line and a second vertical portion on another side of the bit line opposite the first vertical portion, with each portion of the gate being accessed by the bit line. The memory cell further includes a source region formed below the surface spaced apart from and adjacent each of the floating gate portions and a word line or control gate extending over the substrate, bit line and floating gate portions. The vertical bit line and split floating gate portions extend from the substrate surface to the bottom of the trench, and adjacent portions of the bit line and the floating gate portions extend above the substrate surface at substantially the same height.

REFERENCES:
patent: 4929988 (1990-05-01), Yoshikawa
patent: 5386132 (1995-01-01), Wong
patent: 5479368 (1995-12-01), Keshtbod
patent: 5492846 (1996-02-01), Hara
patent: 5495441 (1996-02-01), Hong
patent: 5512505 (1996-04-01), Yuan et al.
patent: 5617351 (1997-04-01), Bertin et al.
patent: 5640031 (1997-06-01), Keshtbod
patent: 5656544 (1997-08-01), Bergendahl et al.
patent: 5680345 (1997-10-01), Hsu et al.
Yamauchi, Yoshimitsu; Tanaka, Kenichi; Shibayama, Hikou; Miyaka, Ryuichiro--A 5V-Only Virtual Ground Flash Cell With an Auxiliary Gate for High Density and High Speed Application--VLSI Research Laboratory, Sharp Corporation 1991 IEEE, pp. 11.7.1-11.7.4.
Ma, Y; Pang, C.S.; Pathak, J.; Tsao, S.C. and Chang, C.F.--A Novel High Density Contactless Flash Memory Array Using Split-Gate Source-Side-Injection Cell for SV-Only Applications--1994 Symposium of VLSI Technology Digest of Technical Papers--VLSI Research Laboratory, Sharp Corporation, 1994 IEEE, pp. 49-50.

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