Flash memory pipelined burst read operation circuit, method,...

Details Flash memory pipelined burst read operation circuit, method,... Flash memory pipelined burst read operation circuit, method,...

2006-07-18

2006-07-18

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S238500

Reexamination Certificate

active

07079445

ABSTRACT:
Method and apparatus for use with flash memory devices and systems are included among the embodiments. In exemplary systems, a pipelined burst read operation allows the device to support higher data transfer rates than are possible with prior art burst read flash memory devices. Preferably, the flash memory device supports both non-pipelined and pipelined read operations, with the read mode settable from a memory controller. Other embodiments are described and claimed.

REFERENCES:
patent: 5790831 (1998-08-01), Lin et al.
patent: 5798980 (1998-08-01), McClure
patent: 6216180 (2001-04-01), Kendall et al.
patent: 6457075 (2002-09-01), Koutsoures
Datasheets and Specifications Samsung Electronics, “8 M x *8 Bit NAND Flash Memory”; pp. 1-29; www.samsung.com/Products/Semiconductor/Flash/Technicallinfo/datasheets.htm.

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