Flash memory mass storage architecture

Details Flash memory mass storage architecture Flash memory mass storage architecture

1993-03-26

1995-02-07

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Erase

365900, 36523003, 365185, G11C 700

Patent

active

053880838

ABSTRACT:
A semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. (The erase cycle is understood to include, fully programming the block to be erased, and then erasing the block.) Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as hard disk would. Periodically, the mass storage will need to be cleaned up. Secondly, all blocks in the mass storage are used evenly. These advantages are achieved through the use of several flags, a map to correlate a logical address of a block to a physical address of that block and a count register for each block. In particular, flags are provided for defective blocks, used blocks, old version of a block, a count to determine the number of times a block has been erased and written and erase inhibit flag.

REFERENCES:
patent: 4943962 (1990-07-01), Imamiya et al.
patent: 5034926 (1991-07-01), Tanra et al.
patent: 5043940 (1991-08-01), Harari
patent: 5053990 (1991-10-01), Kreifels et al.
patent: 5065364 (1991-11-01), Atwood et al.
patent: 5095344 (1992-03-01), Harari
patent: 5134589 (1992-07-01), Hamano
patent: 5138580 (1992-08-01), Farrugia et al.
patent: 5155705 (1992-10-01), Goto et al.
patent: 5163021 (1992-11-01), Mehrotra
patent: 5168465 (1992-12-01), Harari
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5270979 (1993-12-01), Harari et al.
patent: 5303198 (1994-04-01), Adachi et al.
patent: 5341339 (1994-08-01), Wells
patent: 5341368 (1994-08-01), Henning et al.
T. Nozaki et al., "A 1-Mb EEPROM with MONOS Memory Cell for Semicoductor Disk Application," IEEE Journal of Solid-State Circuits, vol. 26, No. 4, pp. 497-501, Apr. 1991.
S. Leibson, "Nonvolatile in-circuit-reprogrammable memories," EDN, Jan. 3, 1991, pp. 89-102.
W. Lahti and D. McCarron, "Store Data in a Flash," BYTE, Nov. 1990, pp. 311-318.
D. Auclair, "Optimal Solid State Disk Architecture For Portable Computers," SunDisk, presented at The Silicon Valley PC Design Conference, Jul. 9, 1991.
S. Mehroura et al., "Serial 9Mb Flash EEPROM for Solid State Disk Applications," 1992 Symposium on VLSI Circuits Digest of Technical Papers, pp. 24-25.
Kai Hwang & Faye A. Briggs, "Computer Architecture and Parallel Processing", McGraw-Hill, p. 64, 1984.

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