Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-11-12
1999-02-16
Pan, Daniel H.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711165, 711105, 39518305, 36518533, G06F 944, G06F 1212
Patent
active
058729941
ABSTRACT:
In a microcomputer comprising internal buses, a serial communication interface, a flash memory, a RAM, a ROM for storing a writing program, an input/output port, a CPU, and a mode control unit for setting various operation modes and test modes in the microcomputer, a switching circuit is connected between the ROM and the internal buses and between the input/output port and the internal buses. The mode control unit operates the switching circuit in an emulation test mode so that the ROM is deactivated and the input/output port is activated. Then, the CPU reads a program from the serial communication interface and writes the program into the flash memory in accordance with a writing program from the input/output port.
REFERENCES:
patent: 4809167 (1989-02-01), Pawloski et al.
patent: 5459850 (1995-10-01), Clay et al.
patent: 5535328 (1996-07-01), Harari et al.
Akiyama Shin-ichiro
Iizuka Yuichi
Nishimoto Hiroaki
Osada Yuuichi
Yasuda Sadahiro
NEC Corporation
Pan Daniel H.
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