Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2009-01-13
2011-10-25
Ho, Hoai V (Department: 2827)
Static information storage and retrieval
Floating gate
Particular connection
C365S185330, C365S185180
Reexamination Certificate
active
08045382
ABSTRACT:
Disclosed is an erasing method for a flash memory device that includes erasing memory cells of a selected memory block and post-programming the erased memory cells to have a threshold voltage distribution with the lowest level that is at or near 0V. The post-programming includes first post-programming the memory block in the unit of memory block and second post-programming the memory block in the unit of word line.
REFERENCES:
patent: 5122985 (1992-06-01), Santin
patent: 7224613 (2007-05-01), Chen et al.
patent: 2005/0276120 (2005-12-01), Hsia et al.
patent: 2007/0076490 (2007-04-01), Kurata et al.
patent: 2010/0128523 (2010-05-01), Yip
patent: 10-228784 (1998-08-01), None
patent: 1020010037589 (2001-05-01), None
patent: 1020040008529 (2004-01-01), None
Ho Hoai V
Myers Bigel & Sibley & Sajovec
Norman James G
Samsung Electronics Co,. Ltd.
LandOfFree
Flash memory devices and erasing methods thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Flash memory devices and erasing methods thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flash memory devices and erasing methods thereof will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4273049