Flash memory device with burst read mode of operation

Details Flash memory device with burst read mode of operation Flash memory device with burst read mode of operation

2008-07-01

2008-07-01

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S220000

Reexamination Certificate

active

07394719

ABSTRACT:
A flash memory device that includes a number of columns each of which is connected with a plurality of memory cells. A column selector circuit selects a part of the columns in response to a column address, and a plurality of sense amplifier groups are connected with the selected columns by the column selector circuit. The column selector circuit variably selects the columns according to whether the column address is 4N-aligned (where N is an integer having a value of 1 or more). For example, the column selector circuit chooses columns of the column address when the column address is 4N-aligned, and chooses columns of an upper column address when the column address is not 4N-aligned.

REFERENCES:
patent: 6362661 (2002-03-01), Park
patent: 6400606 (2002-06-01), Cho
patent: 6425062 (2002-07-01), Kendall
patent: 6507534 (2003-01-01), Balluchi
patent: 6958949 (2005-10-01), Confalonieri et al.

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