Flash memory device employing disturbance monitoring scheme

Details Flash memory device employing disturbance monitoring scheme Flash memory device employing disturbance monitoring scheme

2007-03-30

2009-06-30

Dinh, Son (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185110, C365S189050, C365S185280, C365S185230, C365S230080

Reexamination Certificate

active

07554847

ABSTRACT:
A flash memory device comprises a memory cell array including a plurality of NAND strings respectively connected to a plurality of bit lines, and further comprising a disturbed string coupled to a disturbed bit line. In a program operation of the flash memory device, a voltage level of the disturbed bit line is detected to detect program or pass voltage disturbance in the memory cell array.

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