Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2004-03-04
2009-10-20
Shah, Sanjiv (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C710S052000, C710S053000, C711S103000, C711S202000
Reexamination Certificate
active
07606993
ABSTRACT:
A controller included in a flash memory system, which can be applied to a memory interface of a host computer is disclosed. A buffer is used for data exchange operation between the host computer and the controller, and data exchange operation between a flash memory and the controller. A host interface control block as a first control block controls data exchange operation between the buffer and the host computer. A flash sequencer block as a second control block controls data exchange operation between the buffer and the flash memory. The host interface control block controls input and output operation of the buffer, based on a memory control signal and a memory address signal supplied from the host computer. The flash sequencer block controls input and output operation of the buffer at a one-page size of the flash memory.
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Oyaizu Tsuyoshi
Terasaki Yukio
Shah Sanjiv
TDK Corporation
Townsend and Townsend / and Crew LLP
Yu Jae U
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