Flash memory cell with drain and source formed by diffusion...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S314000, C257S316000, C257S320000, C257S321000, C257S322000, C257S326000

Reexamination Certificate

active

06943401

ABSTRACT:
The present invention is a flash memory manufacturing process that facilitates efficient fabrication of a flash memory cell. In one embodiment, a silicide (e.g., CoSi) is utilized as a diffusion source. A layer of silicide is deposited over a source area and drain area. The dopant is implanted into the CoSi and diffuse out conformably along CoSi-Si interface at a relatively low temperature. The low temperature diffusion facilitates fabrication of a Flash core cell with a very shallow source/drain junction, and as a result a robust DIBL. The present invention also facilitates fabrication of memory cells with smaller spacers and shorter gate length.

REFERENCES:
patent: 5814854 (1998-09-01), Liu et al.
patent: 5960270 (1999-09-01), Misra et al.

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