Flash memory cell and method for manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S322000

Reexamination Certificate

active

07061045

ABSTRACT:
The present invention relates to a flash memory and a method for manufacturing the same, capable of minimizing resistance of the common source line in the flash memory cell manufacturing process. In the memory cell manufacturing method according to the embodiment of the present invention, trench lines are continuously formed on a semiconductor substrate, and gate oxide film lines are formed on the semiconductor substrate except at the trench lines. Sequentially, gate lines vertical with the trench lines are formed on the trench lines and the gate oxide film lines, and the dielectric material of the trench line and the gate dielectric film between adjacent gate lines is removed, and a conductive film of Ti/TiN or Co/Ti/TiN is deposited on the common source region, and then a silicide is formed on the common source region by means of annealing.

REFERENCES:
patent: 5837584 (1998-11-01), Lu et al.
patent: 5962890 (1999-10-01), Sato
patent: 6242305 (2001-06-01), Foote et al.
patent: 1020000004241 (2000-01-01), None
Lee, Min Gyu et al., Method for Forming Common Source Lines of Flash EEPROM, English Abstract of Korean Patent Abstract 1020000004241 A, 01-25-2000, Korean Intellectual Property Office, Republic of Korea.

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