Flash memory cell and fabrication thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S314000, C257S316000, C257S317000

Reexamination Certificate

active

06906377

ABSTRACT:
A flash memory cell is described, including at least a substrate, a tunnel oxide layer, a floating gate, an insulating layer, a control gate and an inter-gate dielectric layer. The tunnel oxide layer is disposed on the substrate. The floating gate is disposed on the tunnel oxide layer, and is constituted by a first conductive layer on the tunnel oxide layer and a second conductive layer on the first conductive layer. The second conductive layer has a bottom lower than the top surface of the first conductive layer, and has a bowl-like cross section. The insulating layer is disposed between the floating gates, and each control gate is disposed on a floating gate with an inter-gate dielectric layer between them.

REFERENCES:
patent: 5767005 (1998-06-01), Doan et al.
patent: 5830771 (1998-11-01), Fukatsu et al.
patent: 6248631 (2001-06-01), Huang et al.
patent: 6372617 (2002-04-01), Kitamura
patent: 6413818 (2002-07-01), Huang et al.
patent: 6713348 (2004-03-01), Kao et al.
patent: 6762093 (2004-07-01), Rudeck

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