Flash memory array with two interfaces for responding to RAS and

Details Flash memory array with two interfaces for responding to RAS and Flash memory array with two interfaces for responding to RAS and

1995-12-27

1999-04-06

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

365120, 36518905, 365222, 711104, G06F 1200, G06F 1300

Patent

active

058931350

ABSTRACT:
An arrangement for accessing a non-volatile memory array including providing a signal having a first condition if an access is a read and a second condition if an access is for any other operation; reading data directly from an address in the non-volatile memory array if the signal is a first condition; and performing any other access of the non-volatile memory array utilizing a command-centric interface if the signal is a second condition.

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