Flash memory array with a top gate line dynamically coupled...

Details Flash memory array with a top gate line dynamically coupled... Flash memory array with a top gate line dynamically coupled...

2008-11-07

2010-02-16

Tran, Andrew Q (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185140, C365S185260, C365S185030, C365S185230, C365S185190, C365S185120, C365S185110

Reexamination Certificate

active

07663921

ABSTRACT:
Systems and methods are disclosed including memory cells arranged in sectors. In one exemplary implementation, each memory cell may include a top gate, a source, a top gate line coupling memory cells in a sector, and a word line coupling memory cells together. Moreover, the top gate line may be dynamically coupled to the word line. Other exemplary implementations may relate to drivers for driving the word line and/or top gate line, multilevel memory cell, and/or floating gate line features.

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