Flash memory

Details Flash memory Flash memory

2005-08-16

2005-08-16

Wilson, Allan R. (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S314000

Reexamination Certificate

active

06930349

ABSTRACT:
A manufacturing method of a flash memory comprising forming a patterned first dielectric layer, forming a patterned first conductive layer and a patterned hard mask layer on a substrate. Next, forming a conformal second conductive layer on the substrate, and etching back the second conductive layer by using the hard mask layer as a etching stop layer to form a conductive spacer on both of the sidewalls of the first conductive layer. Thereafter, removing the hard mask layer, and forming a second dielectric layer and a third conductive layer on the substrate. Finally, a stacked gate structure is constructed by the third conductive layer, the second dielectric layer, the first conductive layer, the conductive spacer and the first dielectric layer, in which a floating gate of the stacked gate structure is constructed by a remainer portion of the first conductive layer and the conductive spacer. And a source/drain region is formed in both sides of the stacked gate structure.

REFERENCES:
patent: 5063172 (1991-11-01), Manley
patent: 5912840 (1999-06-01), Gonzalez et al.
patent: 6171909 (2001-01-01), Ding et al.
patent: 6200856 (2001-03-01), Chen

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