Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-01-14
2001-02-13
Chaudhuri, Olik (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S315000, C257S404000, C257S640000, C257S914000
Reexamination Certificate
active
06188101
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to Flash EPROMs, and more particularly to Flash EPROMs with reduced short channel effect.
BACKGROUND OF THE INVENTION
Nonvolatile programmable memories operate similar to read only memories with the attribute of being programmable at least once. Included in nonvolatile memory types are Flash EPROMs (ultraviolet erasable programmable read only memories). Typical Flash EPROM cell structures are either charged or discharged in order to program or erase the cells and store information. In general terms, charging refers to the activity of putting electrons onto a floating gate of the cell, while discharging refers to the activity of taking electrons off of the floating gate of the cell. When charged, the cell has a low current and a high threshold voltage, V
t
. Conversely, when discharged, the cell has a high current and a low V
t
.
Presently, scaling down of Flash EPROM cells has been considered critical in continuing the trend toward higher device density. Typically, however, the scaling of cell size has not been accompanied by a scaling in the internal operation voltage requirement for the cell. As the size of the cells shrink, short channel effect becomes problematic. Short channel effect generally refers to the problem associated with drain induced barrier lowering (DIBL) and threshold voltage roll-off with channel length. With larger cell sizes, the channel between the source and drain is long and the transient electrical field generated is very small during the charging period, i.e., during the period when the voltage is applied to the source. However, as the channel becomes shorter due to cell size shrinkage, short channel effect becomes more problematic.
Attempts to combat the problem of short channel effect include the reduction of doping in a source side implant. The reduction in doping usually leads to less diffusion of the source dopant in the channel. However, an inherent limit to the doping reduction exists, since a certain level of doping is required to maintain proper cell erase functionality.
Accordingly, a need exists for a manner of reducing short channel effect in a Flash EPROM cell, while maintaining reliable cell operation through preferred doping levels.
SUMMARY OF THE INVENTION
The present invention provides reduction in the short channel effect of a Flash EPROM cell. The method includes forming a gate structure on the substrate structure, and performing a nitrogen implant. Further included is performing device doping, wherein the nitrogen implant inhibits diffusion of dopant material into a channel of the cell. A Flash EPROM cell with reduced short channel effect includes a gate region, a drain region, and a source region, the source region and drain region defining a channel region therebetween beneath the gate region. The source region and drain region further have nitrogen implanted therein to reduce lateral diffusion of dopant material into the channel region.
REFERENCES:
patent: 5446298 (1995-08-01), Kojima
patent: 5500816 (1996-03-01), Kobayashi
patent: 5504358 (1996-04-01), Hong
patent: 5514902 (1996-05-01), Kawasaki et al.
patent: 5516707 (1996-05-01), Loh et al.
patent: 5557122 (1996-09-01), Shrivastava et al.
patent: 5610084 (1997-03-01), Solo de Zaldivar
patent: 5672521 (1997-09-01), Barsan et al.
patent: 5689459 (1997-11-01), Chang et al.
patent: 5750435 (1998-05-01), Pan
patent: 5834351 (1998-11-01), Chang et al.
patent: 5837585 (1998-11-01), Wu et al.
patent: 5888870 (1999-03-01), Gardner et al.
patent: 5940325 (1999-08-01), Chang et al.
patent: 5972783 (1999-10-01), Arai et al.
patent: 5998828 (1999-12-01), Ueno et al.
Novel NICE (Nitrogen Implantation inot CMOS Gate Electrode and Source-Drain) Structure for High Reliability and High Performance 0.26 um Dual Gate CMOS, T. Kuroi et al., IDEM Dec. 1993 pp. 325-328.
Advanced Micro Devices , Inc.
Chaudhuri Olik
Coleman William David
Sawyer Lawyer Group LLP
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