Static information storage and retrieval – Read/write circuit – Erase
Patent
1990-08-06
1993-12-07
Gossage, Glenn
Static information storage and retrieval
Read/write circuit
Erase
365185, 36518907, 365236, 365200, 371 101, 371 102, 371 211, 371 214, G06F 1120, G11C 2900, G11C 1606
Patent
active
052688704
ABSTRACT:
A memory system made up of electrically programmable read only memory (EPROM) or flash electrically erasable and programmable read only memory (EEPROM) cells. An intelligent programming technique allows each memory cell to store more than the usual one bit of information. An intelligent erase algorithm prolongs the useful life of the memory cells. Individual records of the number of erase cycles experienced by blocks of flash EEPROM cells are kept, preferably as part of the blocks themselves, in order to maintain an endurance history of the cells within the blocks. A series of pulses of increasing voltage is applied during programming and erasing of the array. During erasing, specified cells within a block of cells being erased are read in-between the pulses, and the process is stopped when the specified cells are read to have reached a desired state or a maximum number of pulses is reached. The entire block is then read to determine the number of cells that have not been completely erased. The unerased cells are replaced by redundant cells unless there are too many unerased cells, in which case a flag is generated to indicate that the array may have reached its endurance limit. Use of these various features provides a memory having a very high storage density and a long life, making it particularly useful as a solid state memory in place of magnetic disk storage devices in computer systems.
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