Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1998-04-15
2000-03-28
Saadat, Mahshid
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257316, 257321, H01L 29788
Patent
active
060435305
ABSTRACT:
A Flash EEPROM cell employing a sidewall polysilicon spacer as an erase gate. The cell is programmed by source side channel hot electron injection and erased by poly-to-poly tunneling through a poly tunnel oxide between the floating gate and the erase gate. The floating gate is defined by the control gate sidewall spacer which is formed before the floating gate poly self-aligned etch step. The polysilicon sidewall spacer erase gate is formed after growing a poly tunnel oxide on the sidewall of the floating gate poly. Since the poly tunnel oxide thickness is minimized, a fast programming with a low power consumption can be achieved. By using poly-to-poly tunneling erase scheme, a deep source junction is not used and cell size can be significantly reduced. Furthermore, a large sector of cells can be erased simultaneously without a power consumption concern and further V.sub.cc scaling becomes possible.
REFERENCES:
patent: 4794565 (1988-12-01), Wu
patent: 5041866 (1991-08-01), Lee
patent: 5067108 (1991-11-01), Jeng
patent: 5284784 (1994-02-01), Manley
patent: 5380672 (1995-01-01), Yuan et al.
patent: 5402374 (1995-03-01), Tsuruta et al.
patent: 5534456 (1996-07-01), Yuan
patent: 5614747 (1997-03-01), Ahn et al.
patent: 5708285 (1998-01-01), Otani et al.
patent: 5712179 (1998-01-01), Yuan
patent: 5801414 (1998-09-01), Shinmori
patent: 5838039 (1998-11-01), Sato et al.
IEEE, JSSC, vol. 27 No. 11, p. 1547, Nov. 1992, Toshikatsu Jinbo.
IEEE, JSSC, vol. 29 No. 4, p. 461, Apr. 1994, Shigeru Atsumi.
IEEE, IEDM, p. 603 Dec. 1989, K. Naruke.
Eckert II George C.
Saadat Mahshid
LandOfFree
Flash EEPROM device employing polysilicon sidewall spacer as an does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Flash EEPROM device employing polysilicon sidewall spacer as an , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flash EEPROM device employing polysilicon sidewall spacer as an will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1328120