First order tuning circuit for a phase-locked loop

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C329S307000, C455S260000, C455S262000

Reexamination Certificate

active

06310927

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to electronic circuits, and more specifically to a phase-locked loop circuit having a novel tuning circuit.
2. Description of the Prior Art
Phase-locked loop circuits are well known in the industry generally, and are known as circuits highly suitable to integration in monolithic integrated circuits. Typical applications of phase-locked loops include tone decoding, demodulation of AM and FM signals, frequency multiplication, frequency synthesis, and pulse synchronization of signals from noisy sources. For example, in local area networks based on network technology such as ethernet, phase lock loop circuitry can be used to both lock onto the data signal made available over the communication line, and to allow the underlying clock signal to be extracted from the data.
First order phase-locked loop circuits have a phase detector, an amplifier, and a voltage controlled oscillator. The output of the voltage controlled oscillator is fed back into the phase detector, which generates a signal indicative of the phase differential between the signal input and the output of the voltage controlled oscillator. A second order phase-locked loop additionally contains a low-pass filter between the output of the phase detector and the input of the amplifier.
It is well known that first order and second order phase-locked loops have different advantages and drawbacks. One drawback of known first order loops is that they do not have the desirable “flywheel” property, allowing the voltage controlled oscillator to smooth out noise in the input signal and maintain lock even if the input signal is lost for a short period of time. First order phase-lock loops are known to have the advantages of increased capture range and decreased capture time, allowing lock to be obtained much faster than typical second order circuits.
It would be desirable to provide an improved first order phase-locked loop design which allows the advantages of first order circuits to be retained, while overcoming some of the disadvantages. It would be desirable for such a circuit to ensure lock to the correct frequency. It would be desirable for the technology used in such improved circuit to be of a type which can be easily incorporated into standard integrated circuit devices.
SUMMARY OF THE INVENTION
Therefore, in accordance with the present invention, a first order phase-locked loop includes a tuning circuit which allows phase lock to be quickly reached, and to be maintained during transient situations such as loss of the data signal. Such an improved circuit has a tuning circuit for the voltage controlled oscillator which utilizes two capacitors. Two signals are used to drive a first, larger, capacitor, and have the same duty cycle when the capacitor voltage is proper and the voltage controlled oscillator is operating at the correct frequency. A second, smaller, capacitor is used to quickly achieve phase lock with the incoming data signal. The use of two oppositional signals to drive the capacitors allows them to more quickly be charged or discharged to the proper voltage level to obtain both frequency and phase lock with the incoming data signal. Thus, the circuit is able to quickly acquire lock during power-up, or reacquire lock under circumstances where the operating condition of the circuit changes suddenly. The circuit always locks to the correct frequency, as opposed to a harmonic thereof.


REFERENCES:
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patent: 5175884 (1992-12-01), Suarez
patent: 5276712 (1994-01-01), Pearson

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