First-in first-out semiconductor memory device

Details First-in first-out semiconductor memory device First-in first-out semiconductor memory device

1993-09-01

1995-06-20

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Parallel read/write

365221, 365236, 36518907, 36523005, G11C 700

Patent

active

054266122

ABSTRACT:
The number of bits of data items read in parallel fashion and the number of bits of data items written in parallel fashion are related to be at least a whole number multiple of 2, thereby to achieve enhancement in the efficiency of data transfer between a semiconductor memory device and the exterior thereof.
Further, in a semiconductor memory device of FIFO type, the number of stored data items is calculated using the values of a write counter and a read counter, thereby to achieve the accurate acquisition of the number of stored data items even when the operations of reading and writing data items coincide.
In a semiconductor memory device having a built-in address counter, the value of the address counter or an external address signal is selected on the basis of an external instruction in order to address a memory cell, thereby to achieve facilitation of random accesses to memory cells and also the clearing of the data items of any desired memory cells.

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Harold, "A succession of 15-to 20-MHz CMOS FIFO Data Buffers Appear in the U.S. Market", Nikkei Electronics, No. 423, pp. 181-188, Jun. 15, 1987.

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