First in first out (FIFO) memory

Details First in first out (FIFO) memory First in first out (FIFO) memory

1977-10-11

1979-04-24

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Serial read/write

365 78, 365233, 307221R, 307238, 328 37, G11C 1300, G11C 2100

Patent

active

041516095

ABSTRACT:
This disclosure is directed to a First In First Out memory which comprises a register, an input control section, a register control section, and an output control section. The imput control section allows data to be entered into the First In First Out memory while the register control section shifts the data through the memory queing up at the locations closest to the output. The output control allows data to be taken out of the FIFO at a different rate than data is entered into the memory by the input control section. The register control section monitors the succeeding location and the previous location in the register to determine when data may be shifted in the register.

REFERENCES:
patent: 2842682 (1958-07-01), Clapper
patent: 3297950 (1967-01-01), Lee
patent: 3573754 (1971-04-01), Merryman
patent: 3676701 (1972-07-01), Kasperkouitz
patent: 3851187 (1974-11-01), Pao

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