Finite state machine with means for the reduction of noise effec

Details Finite state machine with means for the reduction of noise effec Finite state machine with means for the reduction of noise effec

1994-03-29

1995-12-19

Westin, Edward P.

Electronic digital logic circuitry

Multifunctional or programmable

Sequential or with flip-flop

326 40, 371 691, H03K 19173

Patent

active

054771684

ABSTRACT:
A finite state machine that may receive actuator signals and has a plurality of elementary sequential logic elements fed by the actuator signals. Through various interconnections between the elements a first set of interconnected logic states is realized that are activated through combined occurrence of a particular predecessor state and an associated actuator signal. In various ones of said logic states a particular output signal is produced. Furthermore, the finite state machine has a subset of redundant logic states that are aggregated together with a particular operational by appropriate interconnections for collectively emulating the operational state in question.

REFERENCES:
patent: 4438350 (1984-03-01), Shepter
patent: 4455652 (1984-06-01), Van Der Muelen
patent: 5015886 (1991-05-01), Choi et al.
patent: 5097151 (1992-03-01), Eerenstein
patent: 5206547 (1993-04-01), Houghton
Altera Corp., Application Note 22, Designing with AHDL., Apr. 1992, ver. 2, pp. 87-116.

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