Finite state machine circuit

Details Finite state machine circuit Finite state machine circuit

2006-06-13

2006-06-13

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Sequential or with flip-flop

C326S037000, C326S040000

Reexamination Certificate

active

07061272

ABSTRACT:
A finite state machine (FSM) circuit including a random access memory (RAM) as the basic logical element and a multiplexer, which can be programmed to perform arbitrary sequences of events. The RAM is used as a state table and output states are fed back to determine the next memory location. The number of locations in the RAM is reduced in comparison with prior art devices, which minimises power consumed by a microprocessor implementing such an FSM. This reduction in the number of locations is possible because only relevant inputs to the RAM are selected. The circuit has both synchronous and asynchronous implementations.

REFERENCES:
patent: 4390969 (1983-06-01), Hayes
patent: 5125098 (1992-06-01), Burrows
patent: 6803787 (2004-10-01), Wicker, Jr.
patent: 94/01953 (1994-01-01), None
patent: 98/26348 (1998-06-01), None

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