FinFET structure with multiply stressed gate electrode

Details FinFET structure with multiply stressed gate electrode FinFET structure with multiply stressed gate electrode

2009-07-20

2011-11-15

Wojciechowicz, Edward (Department: 2895)

Semiconductor device manufacturing: process

Introduction of conductivity modifying dopant into...

Ion implantation of dopant into semiconductor region

C438S479000, C438S527000, C438S528000, C438S530000, C438S533000

Reexamination Certificate

active

08058157

ABSTRACT:
A semiconductor structure and its method of fabrication include a semiconductor fin located over a substrate. A gate electrode is located over the semiconductor fin. The gate electrode has a first stress in a first region located closer to the semiconductor fin and a second stress which is different than the first stress in a second region located further from the semiconductor fin. The semiconductor fin may also be aligned over a pedestal within the substrate. The semiconductor structure is annealed under desirable stress conditions to obtain an enhancement of semiconductor device performance.

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Application No. 200610139559.8 Title: FinFet Structure With Multiply Stressed Gate Electrode Zhu, Huilong, et al. Notice of Rejection dated May 15, 2009.
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