Fine resolution digital delay line with coarse and fine adjustme

Details Fine resolution digital delay line with coarse and fine adjustme Fine resolution digital delay line with coarse and fine adjustme

1994-10-18

1996-08-06

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

370108, 327149, 327150, H03D 324

Patent

active

055442030

ABSTRACT:
A device and method for reducing phase jitter in digital phase locked loop applications resulting in smaller clock skews between application specific integrated circuits (ASICs). Phase jitter is reduced by a fine resolution digital delay line (20) comprising both coarse stages (variable delay element 24) for rough/fast phase adjustment and fine stages (fine resolution delay element 22) for precise delay adjustment when phase lock is near.

REFERENCES:
patent: 4805195 (1989-02-01), Keegan
patent: 5077529 (1991-12-01), Ghoshal et al.
patent: 5079519 (1992-01-01), Ashby et al.
patent: 5109394 (1992-04-01), Hjerpe et al.

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