Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2000-06-30
2003-06-10
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S754000, C257S771000
Reexamination Certificate
active
06577005
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a fine projection structure having a fine projection consisting of a solid solution of semiconductor-metal of nanometer size and a method for manufacturing the same.
BACKGROUND ART
A degree of integration of semiconductor devices typical in DRAMs is yearly increasing. For instance, the degree of integration of a DRAM has been increased from 16 Mbit to 64 Mbit or 256 Mbit, further being on the increase to Gbit. Such a high integration of semiconductor devices is achieved due to a reduction of a unit device size down to sub-micron order. In developing the finer unit device size, progress in lithography technology has contributed largely. In addition to the progress of lithography technology, an improvement of element structure is also in progress.
As to the lithography technology, exposure technology with KrF excimer laser, which is conformable to 0.25 &mgr;m rule, is developed. With this technology, 64 Mbit-DRAMs are in mass production and 256 Mbit-DRAMs are in progress in a practical application. Further, the exposure technology with the KrF excimer laser is in improvement to conform to 0.15 &mgr;m rule and exposure technology with SOR light or the like is being in progress. However, with the existing lithography technology, approximately 0.1 &mgr;m rule is considered to be a limit. Accordingly, to achieve further higher integration, it is desired to realize in the future a unit device size of nano-meter order.
Further, a device of quantum size, as a candidate for the future LSI technology, is highly expected. For instance, there are quantum-wire and quantum-box devices that make use of wire and box structures respectively of which cross sections are comparable with a quantum mechanical wavelength of an electron, and a resonant-tunneling effect device and resonant tunnel element that make use of a quantum well. Thus, by utilizing a quantum size effect and quantum tunnel effect, new devices are tried to be realized.
In order to positively utilize a quantum effect to develop a new device, it is important for a characteristic dimension of a device not to stay in the order of phase wavelength (0.1 to 1 &mgr;m), that is in a mesoscopic region, but to be reduced to the order of electron wavelength (10 to 100 nm), that is nanoscopic region. Further, to make more effective use of the quantum effect device, the unit device size itself is necessary to be ultra-fine such as, for instance, 10 to 100 nm. However, the existing lithography technology can not realize such a device size with stability.
Further, when considering a practical device structure, after realizing the aforementioned unit device size of nanometer order, bonding state between a conductive layer that is used as various kinds of functional layers and a semiconductor substrate has to be stabilized. When a conductive layer of nanometer order functions as for instance an electrode layer, excellent bonding state between an electrode layer and a semiconductor substrate is necessary to be realized. However, simple disposition of the conductive layer of such a size on the semiconductor substrate can bring about excellent bonding state and more excellent connecting state with a great difficulty.
As mentioned above, study and development of semiconductor devices of ultra-high integration and quantum size devices highly expected as a future candidate of LSI technology are in progress. To realize such ultra-fine devices, the unit device size of nanometer order is necessary to be attained with stability. From these circumstances, ultra-fine technology enabling to attain the unit device size of nanometer is in demand. Further, when considered a practical device structure, bonding and connecting states between the conductive layer and the semiconductor substrate are necessary to be stabilized.
The object of the present invention is to provide a fine projection structure and a manufacturing method thereof. The fine projection structure enables to realize a unit device size demanded in for instance semiconductor devices of ultra-high integration and quantum size devices and to stabilize, in such a device size, bonding and connecting states between a conductive layer and a semiconductor substrate.
DISCLOSURE OF THE INVENTION
A fine projection structure of the present invention comprises a semiconductor substrate, and a fine projection of a maximum diameter of 500 nm or less consisting essentially of a solid solution between a constituent element of the semiconductor substrate and metal and formed selectively at an arbitrary position on a surface of the semiconductor substrate with part thereof precipitating in the semiconductor substrate.
In the present fine projection structure, the fine projection consists of a solid solution between for instance a constituent element of the semiconductor substrate and a metal dissolving the constituent element of the semiconductor substrate at high temperatures. As an applicable semiconductor substrate and metal, a combination of which primary solubility limit at a thermodynamically high temperature region is large and solubility limit at room temperature region decreases largely is used. Accordingly, during heat treatment the solid solution based on the large solubility limit at a high temperature region is formed, and as a fine projection in a final state the solid solution based on the solubility limit of the semiconductor and metal at room temperature region is obtained.
In the present fine projection structure, part of a surface of the semiconductor substrate, with the exception of the fine projection thereon, is covered by a layer. In the present fine projection structure, a maximum diameter of a fine projection can be fine such as 500 nm or less. The size of the fine projection is particularly preferable to be in the range of 20 to 50 nm.
A method for manufacturing a fine projection of a maximum diameter of 500 nm or less structure of the present invention comprises the steps of disposing, on a surface of a semiconductor substrate, a fine particle of a metal; forming a covering layer; and heating in a vacuum atmosphere the semiconductor substrate having the fine particle of metal. The fine particle of metal is capable of dissolving constituent atoms of the semiconductor substrate at high temperatures. The covering layer is formed on the surface of the semiconductor substrate thereon the fine particle of metal is disposed with the exception of the position where the fine particle of metal is disposed. The semiconductor substrate having the fine particle of metal is heated in a vacuum atmosphere to a temperature higher than that where the constituent atoms of the semiconductor substrate and the constituent atoms of the fine particle of metal dissolve due to interdiffusion through an interface thereof to form a fine projection consisting of a solid solution of the constituent atoms of the semiconductor substrate and the constituent atoms of the fine particle of metal.
In the present method for manufacturing a fine projection structure, for the covering layer for instance an oxide film on a surface of a semiconductor substrate can be used. In the present method for manufacturing a fine projection structure, a maximum diameter of the fine particle of metal is preferable to regulate at 1 &mgr;m or less, further at 200 nm or less.
In the present invention, for instance the semiconductor substrate covered by a layer with the exception of a position where the fine particle of metal is disposed undergoes heat treatment at a temperature. The temperature is higher than that dissolves mutually the constituent atoms of the semiconductor substrate and the constituent atoms of the fine particle of metal. During the heat treatment, the semiconductor substrate and the fine particle of metal form a solid solution based on interdiffusion through only the interface thereof.
In this case, the primary solubility limit between the semiconductor substrate and the fine particle of metal is large and the semiconductor atoms are prevented from diffusing through other than a
Tanaka Shun-ichiro
Wakayama Yutaka
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaishia Toshiba
Nadav Dri
Thomas Tom
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