Fine pitch wafer bumping process

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device

Reexamination Certificate

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C430S315000, C438S610000, C438S612000, C438S613000, C427S096400, C427S282000

Reexamination Certificate

active

06555296

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a wafer bumping process. More particularly, the invention relates to a fine pitch wafer bumping process suitable for solder screen printing.
2. Description of the Related Art
In flip chip technology, a wafer bumping process principally consists in forming under bump metal (UBM) structures on contact pads of the wafer and forming bumps on the under bump metal (UBM) structures. Then, the wafer is connected to a substrate through the bumps. In the wafer bumping process, the bumps on the under bump metal (UBM) structures are conventionally formed according to solder screen printing or plating methods. An advantage of the solder screen printing method compared to the plating method for wafer bumping is that its cost is relatively lower. However, a drawback of solder screen printing is that a fine pitch cannot be obtained (a fine pitch is defined as being below 150 &mgr;m).
For cost reasons, it is required to shorten the wafer bumping pitch to obtain a fine pitch standard through employing solder screen printing. Conventionally, the wafer bumping pitch is defined as the length resulting from the addition of the width of the solder opening in the mask layer, corresponding to the location where the bump is formed, with the spacing between each opening. To reduce the pitch, one thus may shorten either the width of the mask layer opening or the spacing between each opening. However, issues in connection with solder screen printing are arisen from each of those both ways of processing, as it is described hereafter with reference to FIG.
1
through FIG.
4
.
In
FIG. 1
, conventionally, a wafer
100
has a plurality of contact pads
102
and a passivation layer
104
that is formed thereon exposing the contact pads
102
. Each contact pad
102
has formed thereon an under bump metal (UBM)
106
. A mask layer
108
is formed on the passivation layer
104
, wherein the mask layer
108
has a plurality of openings
108
a
that expose respectively the under bump metals (UBM)
106
. The thickness t
1
of the mask layer
108
is conventionally 75 &mgr;m. Besides, S
1
represents the width of the mask layer opening
108
a,
and O
1
represents the spacing between each opening. The pitch P
1
, that is, as described above, the sum of the width S
1
of the mask layer opening
108
a
with the spacing O
1
between each opening, is conventionally 250 &mgr;m.
Referring to
FIG. 2
, if the width S
1
of the mask layer opening
108
a
is reduced to S
2
, one must consider the increase of the thickness of the mask layer
108
from t
1
to t
2
in order to keep the same amount of solder material filled by solder screen printing. However, the increase of the thickness of the mask layer is limited by the conventional constraint of minimum spacing between each opening imposed by the mask layer etching, being within the range of 60% through 70% of the thickness of the mask layer. As a result, the spacing O
1
between each opening must be reversibly increased to O
2
. Thus, the pitch P
2
does not allow to have a sought reduction of the pitch.
Referring to FIG.
3
and
FIG. 4
, other issues in connection with solder screen printing, when reducing the mask layer opening, are schematically shown. In
FIG. 3
, the thickness of the mask layer
108
is increased from the value t
1
, as shown in
FIG. 1
, to the value t
2
. The mask layer
108
, usually a photoresist layer, is less rigid than both the usually silicon layer
100
underlying the mask layer and the scraping cutter
216
, made of metallic material and used during solder screen printing. As a result, when the scraping cutter
216
is moved, for example along a direction
218
, to fill the opening with solder material
210
by solder screen printing, a cushion effect may occur, resulting in the formation of a recess
220
in the mask layer (see FIG.
3
). The resulting deviation of the mask layer surface causes an insufficient filling of the solder material
210
a
(see
FIG. 4
) and thus a failure of the ulterior bump formation.
In turn, if the spacing between each opening O
1
is shortened (not shown), the required ratio of 60% through 70% between the spacing between each opening O
1
and thickness t
1
of the mask layer, imposed by the etching, similarly limits the mask layer thickness during solder screen printing. Consequently, a reduction of the thickness t
1
of the mask layer must also be considered. Such a reduction of the thickness of the mask layer results in a mask layer opening that is less deep, which thus causes the solder material not to be sufficiently filled and, consequently, a failure of the subsequent bump formation.
SUMMARY OF THE INVENTION
One major aspect of the invention therefore is to provide a wafer bumping process that can employ a solder screen printing method to obtain a fine pitch wafer bumping.
To obtain the fine pitch wafer bumping, when the width of the mask layer opening should be reduced, the present invention proposes increasing the mask layer thickness through separately forming at least two mask films in order to fill the sufficient amount of solder material. As a result, the width of the mask layer opening can be reduced without an increase of the spacing between each opening. Since the thickness of the mask layer is increased through separately forming two mask films relatively thinner than the conventional single mask layer, the solder screen printing for filling the solder material can thus be separately applied to the both relatively thinner mask films, which eliminates the cushion effect issue when the scraping cutter is applied to the mask films. The solder material is sufficiently filled and a fine pitch wafer bumping is obtained.
To obtain the fine pitch wafer bumping, when the width of the mask layer opening is shortened, the present invention proposes separately forming at least two mask films in order to deepen the mask layer openings such that a sufficient amount of solder material can be filled. Since the two mask films that are employed are thinner than the conventional single mask layer, the solder screen printing thus can be separately applied to the both mask films and the limitation condition linking the mask layer thickness and the opening spacing while solder screen printing can be overcome. Hence, the fine pitch wafer bumping can be obtained.
To attain the foregoing and other objects, the present invention provides a fine pitch wafer bumping process that comprises: providing a wafer that has a plurality of contact pads and a passivation layer that is formed on the surface of the wafer while exposing the contact pads, wherein the surface of each of the contact pads has respectively an under bump metal (UBM); forming a first mask film over the surface of the wafer, wherein the first mask film has a plurality of first openings that expose respectively the under bump metals (UBM); filling a first solder material respectively in the first openings; reflowing the first solder material to form respectively a plurality of first solder posts; forming a second mask film on the first mask film, wherein the second mask film has a plurality of second openings that respectively expose the first openings; filling a second solder material respectively in the second openings; reflowing the second solder material and the first solder posts to form a plurality of second solder posts; stripping away the first mask film and the second mask film; and reflowing the first and second solder posts together to form a plurality of bumps.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5266446 (1993-11-01), Chang et al.
patent: 5587342 (1996-12-01), Lin et al.
patent: 5803343 (1998-09-01), Sarma et al.
patent: 6077765 (2000-06-01), Naya
patent: 6109507 (2000-08-01), Yagi et al.
patent: 6264097 (2001-07-01), Sano
patent: 6348401 (2002-02-01), Chen et al.
“Squeegee Bump Techno

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