Fine pitch solder deposits on printed circuit board process and

Metal fusion bonding – Process – Preplacing solid filler

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Details

22818022, 228225, 427123, 427282, H05K 334, B23K 100

Patent

active

054922666

ABSTRACT:
A method, and product created thereby, by which low melting point solder suitable for reflow connection of components is formed on select contacts of a printed circuit board. The method is particularly suited to the fabrication of populated printed circuit board having fine pitch devices including flip-chip devices, connected on a board including conventional coarse pitch surface mounted components. The fine pitch contacts of the board are exposed through holes in a stencil characterized in its ability to withstand solder reflow temperatures, not be wettable by solder, and have a coefficient of thermal expansion relatively matching the printed circuit board. Low temperature solder paste is screen deposited into the stencil openings. With the stencil fixedly positioned on the board, the solder paste retained by the stencil pattern is reflowed to selectively form on the underlying contacts of the printed circuit board. Thereafter, according to a preferred practice of the invention, the stencil is removed from the board and the board is subject to previously practiced depositions of flux and paste in preparation for fine and coarse pitch component placement and ensuing solder reflow. Alternate practices of the invention involve concurrent deposition of fine and coarse pitch solder and retention of the stencil following fine pitch solder fellow.

REFERENCES:
patent: 4722470 (1988-02-01), Johary
patent: 5060844 (1991-10-01), Behun et al.
patent: 5147084 (1992-09-01), Behun et al.
patent: 5400953 (1995-03-01), Maeno
IBM TDB "Solder Preform Technique for Fine Pitch Surface Mount Technology Components", vol. 36, No. 2, pp. 397, 398, Feb. 1993.
IBM TDB, vol. 37, No. 02B, Feb. 94, "Improvements in the Sacrificial Substrate Burn-In Methodology for Known Good Die", pp. 19-20.
IBM TDB, vol. 30, No. 7, Dec. 87, "Fine Pitch Printing for Surface Mounted Technology", pp. 314-315.
Research Disclosure, Nov. 88, No. 295, "Solder Mask Elimination on Printed Circuit Boards".
Research Disclosure, Feb. 92, No. 334, "Ladder Pattern for Soldering Circuit Board Ground Pads".
Sandia National Laboratories, DE93 009631, "A Maskless Flip-Clip Solder Bumping Technique", Chu et al.
Circuits Assembly, Feb. 93, "A Step in the Right Direction", Payne et al, pp. 59-64.

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