Filtering bit position in a memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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C711S154000, C711S167000

Reexamination Certificate

active

07454559

ABSTRACT:
A memory includes a plurality of first-in-first-out (FIFO) cells, an output pointer counter, a write training block and a temporary data register. The output pointer counter is for switching a value of a FIFO output pointer among the FIFO cells. The write training block is for moving the FIFO output pointer based on data read from the FIFO cells. The temporary data register is for storing a single bit representing one or more bits in each FIFO cell.

REFERENCES:
patent: 6731567 (2004-05-01), Acharya et al.
patent: 7203127 (2007-04-01), Tamlyn et al.
patent: 2004/0022099 (2004-02-01), Ozawa
patent: 2005/0220239 (2005-10-01), Sigurdsson et al.
patent: 2005/0254307 (2005-11-01), Dietrich et al.
patent: 2007/0070788 (2007-03-01), Tamlyn et al.

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