Electrical computers and digital data processing systems: input/ – Interrupt processing – Programmable interrupt processing
Reexamination Certificate
2011-01-18
2011-01-18
Rinehart, Mark (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
Programmable interrupt processing
C710S260000, C710S269000
Reexamination Certificate
active
07873770
ABSTRACT:
In one embodiment, an input/output memory management unit (IOMMU) comprises a control register and control logic coupled to the control register. The control register is configured to store a base address of a device table, wherein a given input/output (I/O) device has an associated device identifier that selects a first entry in the device table. The first entry comprises a pointer to an interrupt remapping table. The control logic is configured to remap an interrupt specified by an interrupt request received by the IOMMU from the given I/O device if the interrupt remapping table includes an entry for the interrupt.
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Hummel Mark D.
Kegel Andrew G.
Lueck Andrew W.
Daley Christopher A
Globalfoundries Inc.
Merkel Lawrence J.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Rinehart Mark
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