Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – On insulating carrier other than a printed circuit board
Reexamination Certificate
2001-06-19
2002-09-17
Chaudhuri, Olik (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
On insulating carrier other than a printed circuit board
C257S778000, C257S666000
Reexamination Certificate
active
06452257
ABSTRACT:
TECHNICAL FIELD
This invention relates to a semiconductor device, a method of making the same, a circuit board, and a film carrier tape and, in particular, to a semiconductor device, a method of making the same, a circuit board, and a film carrier tape in which the package size is close to the chip size.
BACKGROUND OF ART
If high-density mounting of semiconductor devices is to continue, bare-chip mounting would be ideal. However, quality assurance and handling are difficult in the bare chip state. A packaging method called CSP (Chip Scale/Size Package) has been developed to provide a bare-chip package which has a size when packaged that is close to the chip size.
In one of the various forms of CSP semiconductor device that have been developed, a flexible substrate is provided on an active surface side of a semiconductor chip, and a plurality of external electrodes are formed on this flexible substrate. With this CSP semiconductor device, the external electrodes are provided within the area of the semiconductor chip. This means that there are no “outer leads,” which are leads that extend from the side surfaces of the actual package, as in QFP (Quad Flat Package) or TCP (Tape Carrier Package).
In a CSP semiconductor device using a flexible substrate, a known method of absorbing thermal stresses is to inject resin between the active surface of the semiconductor chip and the flexible substrate, as disclosed in International Publication WO95/08856, for example. If all of the connection portions for the electrodes of the semiconductor chip are covered by this resin, it is possible to prevent corrosion of the electrodes.
In addition, if a film carrier tape is used when the semiconductor chip is mounted onto the flexible substrate, handling is even easier and mass productivity is also excellent. With this method of using a film carrier tape, individual semiconductor devices are separated from the film carrier after the semiconductor chips have been sealed in resin.
In this case, the wiring formed on the film carrier tape is gold-plated. This gold-plated is implemented by an electroplating (otherwise called “electrolytic plating”) method. In the electroplating method, it is usual to make all of the wiring conductive and extend the wiring out of the region on which the semiconductor chip is to be mounted. The extended wiring is used as electrodes for the electroplating. Note that in the prior art there are outer leads, and these outer leads are used as wiring for the electroplating, by extending them without further modification. If an existing type of flexible substrate is used, plating leads for the electroplating are necessary. The plating leads are usually provided connected directly to the connection leads, and a substrate for TAB (Tape Automated Bonding) is known in the art for use in TCP.
However, if an attempt is made to apply this existing TAB substrate without modification to a CSP type of semiconductor device, the connection leads are connected directly without modification to the plating leads, so that the end surfaces of the leads are exposed from the end surfaces of the package and thus the end surface portions of the leads are inevitably exposed. In a CSP semiconductor device, the external shape of the package is close to the chip size, so that the distance between the outer form of the chip and the outer form of the package is extremely small. Therefore, even if the semiconductor chip is protected by packaging it, it is necessary to make the reliability of the semiconductor chip higher under any surroundings than that of the prior-art package. In particular, if the previously described prior-art configuration is used without modification for a CSP type of semiconductor device, the configuration is such that the distance from the cut surfaces of the leads to the electrodes of the semiconductor chip is extremely short and, moreover, the end portions of the leads are not covered by anything to be exposed, so that corrosion can easily progress along the leads to the electrodes. In addition, the pitch between adjacent leads is becoming increasingly tight, so it is inevitable that causes such as the presence of conductive impurities on the exposed cut surfaces will result in short of the leads, destroying the functions of the device.
On the other hand, this problem can be avoided if the semiconductor devices are separated individually from the film carrier tape and then resin is injected therein. However, this means that loose semiconductor devices have to be handled individually, so that the advantages of the method of using a film carrier tape cannot be realized.
This invention was devised in order to solve the above described problems and has as its objective the provision of a semiconductor device made by using a film carrier tape, in which the package size is close to the chip size, in a configuration for preserving the reliability of the semiconductor chip. In addition, it provides a method of making the same, a circuit board for enclosing the same, and a film carrier tape.
DISCLOSURE OF INVENTION
A method of making a semiconductor device in accordance with this invention is a method of making a resin-sealed type semiconductor device in which a flexible substrate having a plurality of connection leads is used, where one end portion of each of the connection leads is used for connection to one of electrodes of a semiconductor chip and the other end portion thereof is used for connection to an exterior, the method comprising:
a first step of positioning a part of a film carrier tape corresponding to the flexible substrate above the semiconductor chip, and also positioning the one end portion and the other and portion of each of the connection leads within a region of the semiconductor chip;
a second step of connecting the one end portion of each of the connection leads to one of the electrode of the semiconductor chip, after the first step;
a third step of sealing in resin an active surface of the semiconductor chip that comprises the connected electrodes and an area that comprises the one end portion of each of the connection leads, after the second step; and
a fourth step of separating an individual piece from the film carrier tape, after the third step.
In this case, the fourth step is preferably performed outside the resin-sealed region.
In addition, the method could further comprise a step of forming the film carrier tape, before the first step.
This step of forming the film carrier tape could comprise:
a step of forming a conductive pattern on a film, the conductive pattern electrically comprising all of the connection leads, a plurality of connection portions, at least one plating lead and a plating electrode in an electrically conductive state, the connection leads being formed within the region to be sealed in the resin and electrically connecting the electrodes to the exterior, each of the connection portions being connected to one of the connection leads and extending to outside the resin-sealed region, the plating lead being connected to the connection portions outside the resin-sealed region, and the plating electrode being connected to the plating lead;
a step of performing electroplating on the conductive pattern, through the plating electrode; and
a step of punching out at least part of each of the connection portions.
This ensures that the connection leads for connecting the electrodes of the semiconductor chip to the exterior are formed within the resin-sealed region. The package size can therefore be made to be close to the chip size. Since it can be applied to the making of a semiconductor chip using a film carrier tape, it facilitates the handling thereof.
When electroplating is performed on the connection leads, the plating leads and plating electrodes are used. In other words, the connection leads, connection portions, plating leads, and plating electrodes are all in a conductive state, so that electroplating of the connection leads can be performed through the connection leads.
Note that if portions other than those to be electroplated are covered
Chaudhuri Olik
Oliff & Berridg,e PLC
Schillinger Laura M
Seiko Epson Corporation
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