Fill level indicator for self-timed fifo

Details Fill level indicator for self-timed fifo Fill level indicator for self-timed fifo

1993-09-16

1996-04-30

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375371, 395250, 3701053, H04L 700, G11C 1300

Patent

active

055132243

ABSTRACT:
A FIFO uses a fill indicator circuit to indicate a fill status and provide control signals to a data source and data sink to cease operation. A serial string of FIFO cells propagates data from input to output by sending request and acknowledge signals between adjacent cells. The request signal initiates data transfer to the next logical cell and the acknowledge signal indicates completion of the transfer. The fill indicator has one cell for each FIFO cell for monitoring the request and acknowledge signals looking for predetermined state sequences to indicate whether each FIFO cell is full or empty.

REFERENCES:
patent: 4222102 (1980-09-01), Jensen et al.
patent: 4236225 (1980-11-01), Jensen et al.
patent: 4486854 (1984-12-01), Yuni
patent: 4583163 (1986-04-01), Kobayashi et al.
patent: 4598362 (1986-07-01), Kinjo et al.
patent: 4839866 (1989-06-01), Ward et al.
patent: 4891788 (1990-01-01), Kreifels
patent: 5083269 (1992-01-01), Syobatake et al.
patent: 5365552 (1994-11-01), Astle

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