Filament channel transistor interconnected with a conductor

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357 234, 357 59, 357 68, 357 45, H01L 2968, H01L 2978, H01L 2992

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051247666

ABSTRACT:
A method and apparatus is provided for allowing access to a buried wordline conductor (38) of a dynamic random access memory cell array. A selected memory cell is used as a wordline connection cell (47). A local oxide layer (43) is used during the etchant process which is used to form wordline conductors (38). The oxide layer (43) functions as a mask to create a wordline connection body (45). During the formation of the bitline conductors (42), a wordline contact (49) may be similarly formed to provide access to the wordline conductors (38). The wordline connection cell (47) provides efficient access to the wordline conductors (38) and uses only the substrate surface area occupied by a single memory cell.

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IBM Technical Journal, vol. 30, No. 9 Feb. 1988, vol. 31, No. 7 Dec. 1988, vol. 29 No. 5 Oct. 1986, vol. 31, No. 3, Aug. 1988.

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